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llvm-mirror/test/MC/RISCV/rvv
Fraser Cormack 1baf7d8c9b [RISCV] Fix failing RVV MC tests
I believe these failures were introduced by D103790's changes to the
VType formatting found in vsetvli/vsetivli instructions.
2021-06-09 09:47:18 +01:00
..
add.s
aliases.s Revert "[RISCV] Remove -riscv-no-aliases in favour of new -M no-aliases" 2021-05-29 15:11:37 +01:00
and.s
clip.s
compare.s Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper Differential Revision : https://reviews.llvm.org/D100115 2021-04-14 06:41:59 +08:00
convert.s
div.s
ext.s
fadd.s
fcompare.s
fdiv.s
fmacc.s
fminmax.s
fmul.s
fmv.s
fothers.s Revert "[RISCV] Remove -riscv-no-aliases in favour of new -M no-aliases" 2021-05-29 15:11:37 +01:00
freduction.s
fsub.s
invalid.s [RISCV] Have assembler check that the temp register is different than dest register for vmsgeu.vx pseudo. 2021-04-23 09:33:29 -07:00
load.s Revert "[RISCV] Remove -riscv-no-aliases in favour of new -M no-aliases" 2021-05-29 15:11:37 +01:00
macc.s
mask.s
minmax.s
mul.s
mv.s
or.s
others.s Revert "[RISCV] Remove -riscv-no-aliases in favour of new -M no-aliases" 2021-05-29 15:11:37 +01:00
reduction.s
shift.s
sign-injection.s
snippet.s [RISCV] Fix failing RVV MC tests 2021-06-09 09:47:18 +01:00
store.s Revert "[RISCV] Remove -riscv-no-aliases in favour of new -M no-aliases" 2021-05-29 15:11:37 +01:00
sub.s
vsetvl.s [RISCV] Fix failing RVV MC tests 2021-06-09 09:47:18 +01:00
xor.s
zvamo.s [RISCV][NFC] Fix formatting 2021-04-09 14:41:09 +08:00
zvlsseg.s Revert "[RISCV] Remove -riscv-no-aliases in favour of new -M no-aliases" 2021-05-29 15:11:37 +01:00