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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-30 23:42:52 +01:00
llvm-mirror/test/CodeGen
Elena Demikhovsky 139f25ed2c AVX-512: implemented extractelement with variable index.
Added parsing of mask register and "zeroing" semantic, like {%k1} {z}.

llvm-svn: 190595
2013-09-12 08:55:00 +00:00
..
AArch64 Implement aarch64 neon instruction set AdvSIMD (3V Diff), covering the following 26 instructions, 2013-09-09 02:20:27 +00:00
ARM [ARMv8] Prevent generation of deprecated IT blocks on ARMv8 in Thumb mode. 2013-09-09 14:21:49 +00:00
CPP
Generic
Hexagon Debug Info Testing: use null instead of an empty string in context field. 2013-09-09 00:12:17 +00:00
Inputs Debug Info: add an identifier field to DICompositeType. 2013-08-26 22:39:55 +00:00
Mips [mips][msa] Added test cases that were supposed to be part of r190507, r190509, r190512, and r190518. 2013-09-11 12:39:25 +00:00
MSP430
NVPTX [NVPTX] Re-enable assembly printing support for inline assembly 2013-08-24 01:17:23 +00:00
PowerPC PPC: Enable aggressive anti-dependency breaking 2013-09-12 05:24:49 +00:00
R600 R600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL transform feedback 2013-09-12 02:55:14 +00:00
SPARC [Sparc] Correctly handle call to functions with ReturnsTwice attribute. 2013-09-05 05:32:16 +00:00
SystemZ [SystemZ] Add TM and TMY 2013-09-10 10:20:32 +00:00
Thumb ARM: Use "dmb sy" for barriers on M-class CPUs 2013-08-28 14:39:19 +00:00
Thumb2 [ARMv8] Prevent generation of deprecated IT blocks on ARMv8 in Thumb mode. 2013-09-09 14:21:49 +00:00
X86 AVX-512: implemented extractelement with variable index. 2013-09-12 08:55:00 +00:00
XCore XCore handling of thread local lowering 2013-09-09 10:42:11 +00:00