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to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
363 lines
11 KiB
C++
363 lines
11 KiB
C++
//===---------------------------- GCNILPSched.cpp - -----------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/ScheduleDAG.h"
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using namespace llvm;
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#define DEBUG_TYPE "machine-scheduler"
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namespace {
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class GCNILPScheduler {
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struct Candidate : ilist_node<Candidate> {
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SUnit *SU;
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Candidate(SUnit *SU_)
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: SU(SU_) {}
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};
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SpecificBumpPtrAllocator<Candidate> Alloc;
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typedef simple_ilist<Candidate> Queue;
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Queue PendingQueue;
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Queue AvailQueue;
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unsigned CurQueueId = 0;
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std::vector<unsigned> SUNumbers;
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/// CurCycle - The current scheduler state corresponds to this cycle.
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unsigned CurCycle = 0;
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unsigned getNodePriority(const SUnit *SU) const;
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const SUnit *pickBest(const SUnit *left, const SUnit *right);
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Candidate* pickCandidate();
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void releasePending();
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void advanceToCycle(unsigned NextCycle);
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void releasePredecessors(const SUnit* SU);
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public:
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std::vector<const SUnit*> schedule(ArrayRef<const SUnit*> TopRoots,
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const ScheduleDAG &DAG);
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};
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} // namespace
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/// CalcNodeSethiUllmanNumber - Compute Sethi Ullman number.
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/// Smaller number is the higher priority.
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static unsigned
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CalcNodeSethiUllmanNumber(const SUnit *SU, std::vector<unsigned> &SUNumbers) {
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unsigned &SethiUllmanNumber = SUNumbers[SU->NodeNum];
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if (SethiUllmanNumber != 0)
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return SethiUllmanNumber;
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unsigned Extra = 0;
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for (const SDep &Pred : SU->Preds) {
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if (Pred.isCtrl()) continue; // ignore chain preds
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SUnit *PredSU = Pred.getSUnit();
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unsigned PredSethiUllman = CalcNodeSethiUllmanNumber(PredSU, SUNumbers);
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if (PredSethiUllman > SethiUllmanNumber) {
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SethiUllmanNumber = PredSethiUllman;
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Extra = 0;
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}
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else if (PredSethiUllman == SethiUllmanNumber)
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++Extra;
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}
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SethiUllmanNumber += Extra;
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if (SethiUllmanNumber == 0)
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SethiUllmanNumber = 1;
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return SethiUllmanNumber;
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}
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// Lower priority means schedule further down. For bottom-up scheduling, lower
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// priority SUs are scheduled before higher priority SUs.
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unsigned GCNILPScheduler::getNodePriority(const SUnit *SU) const {
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assert(SU->NodeNum < SUNumbers.size());
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if (SU->NumSuccs == 0 && SU->NumPreds != 0)
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// If SU does not have a register use, i.e. it doesn't produce a value
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// that would be consumed (e.g. store), then it terminates a chain of
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// computation. Give it a large SethiUllman number so it will be
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// scheduled right before its predecessors that it doesn't lengthen
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// their live ranges.
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return 0xffff;
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if (SU->NumPreds == 0 && SU->NumSuccs != 0)
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// If SU does not have a register def, schedule it close to its uses
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// because it does not lengthen any live ranges.
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return 0;
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return SUNumbers[SU->NodeNum];
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}
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/// closestSucc - Returns the scheduled cycle of the successor which is
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/// closest to the current cycle.
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static unsigned closestSucc(const SUnit *SU) {
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unsigned MaxHeight = 0;
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for (const SDep &Succ : SU->Succs) {
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if (Succ.isCtrl()) continue; // ignore chain succs
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unsigned Height = Succ.getSUnit()->getHeight();
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// If there are bunch of CopyToRegs stacked up, they should be considered
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// to be at the same position.
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if (Height > MaxHeight)
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MaxHeight = Height;
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}
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return MaxHeight;
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}
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/// calcMaxScratches - Returns an cost estimate of the worse case requirement
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/// for scratch registers, i.e. number of data dependencies.
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static unsigned calcMaxScratches(const SUnit *SU) {
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unsigned Scratches = 0;
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for (const SDep &Pred : SU->Preds) {
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if (Pred.isCtrl()) continue; // ignore chain preds
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Scratches++;
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}
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return Scratches;
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}
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// Return -1 if left has higher priority, 1 if right has higher priority.
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// Return 0 if latency-based priority is equivalent.
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static int BUCompareLatency(const SUnit *left, const SUnit *right) {
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// Scheduling an instruction that uses a VReg whose postincrement has not yet
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// been scheduled will induce a copy. Model this as an extra cycle of latency.
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int LHeight = (int)left->getHeight();
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int RHeight = (int)right->getHeight();
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// If either node is scheduling for latency, sort them by height/depth
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// and latency.
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// If neither instruction stalls (!LStall && !RStall) and HazardRecognizer
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// is enabled, grouping instructions by cycle, then its height is already
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// covered so only its depth matters. We also reach this point if both stall
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// but have the same height.
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if (LHeight != RHeight)
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return LHeight > RHeight ? 1 : -1;
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int LDepth = left->getDepth();
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int RDepth = right->getDepth();
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if (LDepth != RDepth) {
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LLVM_DEBUG(dbgs() << " Comparing latency of SU (" << left->NodeNum
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<< ") depth " << LDepth << " vs SU (" << right->NodeNum
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<< ") depth " << RDepth << "\n");
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return LDepth < RDepth ? 1 : -1;
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}
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if (left->Latency != right->Latency)
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return left->Latency > right->Latency ? 1 : -1;
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return 0;
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}
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const SUnit *GCNILPScheduler::pickBest(const SUnit *left, const SUnit *right)
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{
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// TODO: add register pressure lowering checks
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bool const DisableSchedCriticalPath = false;
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int MaxReorderWindow = 6;
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if (!DisableSchedCriticalPath) {
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int spread = (int)left->getDepth() - (int)right->getDepth();
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if (std::abs(spread) > MaxReorderWindow) {
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LLVM_DEBUG(dbgs() << "Depth of SU(" << left->NodeNum << "): "
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<< left->getDepth() << " != SU(" << right->NodeNum
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<< "): " << right->getDepth() << "\n");
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return left->getDepth() < right->getDepth() ? right : left;
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}
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}
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bool const DisableSchedHeight = false;
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if (!DisableSchedHeight && left->getHeight() != right->getHeight()) {
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int spread = (int)left->getHeight() - (int)right->getHeight();
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if (std::abs(spread) > MaxReorderWindow)
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return left->getHeight() > right->getHeight() ? right : left;
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}
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// Prioritize by Sethi-Ulmann number and push CopyToReg nodes down.
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unsigned LPriority = getNodePriority(left);
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unsigned RPriority = getNodePriority(right);
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if (LPriority != RPriority)
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return LPriority > RPriority ? right : left;
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// Try schedule def + use closer when Sethi-Ullman numbers are the same.
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// e.g.
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// t1 = op t2, c1
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// t3 = op t4, c2
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//
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// and the following instructions are both ready.
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// t2 = op c3
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// t4 = op c4
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//
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// Then schedule t2 = op first.
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// i.e.
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// t4 = op c4
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// t2 = op c3
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// t1 = op t2, c1
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// t3 = op t4, c2
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//
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// This creates more short live intervals.
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unsigned LDist = closestSucc(left);
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unsigned RDist = closestSucc(right);
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if (LDist != RDist)
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return LDist < RDist ? right : left;
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// How many registers becomes live when the node is scheduled.
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unsigned LScratch = calcMaxScratches(left);
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unsigned RScratch = calcMaxScratches(right);
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if (LScratch != RScratch)
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return LScratch > RScratch ? right : left;
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bool const DisableSchedCycles = false;
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if (!DisableSchedCycles) {
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int result = BUCompareLatency(left, right);
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if (result != 0)
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return result > 0 ? right : left;
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return left;
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}
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else {
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if (left->getHeight() != right->getHeight())
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return (left->getHeight() > right->getHeight()) ? right : left;
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if (left->getDepth() != right->getDepth())
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return (left->getDepth() < right->getDepth()) ? right : left;
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}
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assert(left->NodeQueueId && right->NodeQueueId &&
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"NodeQueueId cannot be zero");
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return (left->NodeQueueId > right->NodeQueueId) ? right : left;
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}
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GCNILPScheduler::Candidate* GCNILPScheduler::pickCandidate() {
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if (AvailQueue.empty())
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return nullptr;
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auto Best = AvailQueue.begin();
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for (auto I = std::next(AvailQueue.begin()), E = AvailQueue.end(); I != E; ++I) {
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auto NewBestSU = pickBest(Best->SU, I->SU);
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if (NewBestSU != Best->SU) {
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assert(NewBestSU == I->SU);
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Best = I;
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}
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}
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return &*Best;
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}
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void GCNILPScheduler::releasePending() {
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// Check to see if any of the pending instructions are ready to issue. If
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// so, add them to the available queue.
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for(auto I = PendingQueue.begin(), E = PendingQueue.end(); I != E;) {
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auto &C = *I++;
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if (C.SU->getHeight() <= CurCycle) {
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PendingQueue.remove(C);
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AvailQueue.push_back(C);
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C.SU->NodeQueueId = CurQueueId++;
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}
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}
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}
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/// Move the scheduler state forward by the specified number of Cycles.
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void GCNILPScheduler::advanceToCycle(unsigned NextCycle) {
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if (NextCycle <= CurCycle)
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return;
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CurCycle = NextCycle;
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releasePending();
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}
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void GCNILPScheduler::releasePredecessors(const SUnit* SU) {
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for (const auto &PredEdge : SU->Preds) {
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auto PredSU = PredEdge.getSUnit();
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if (PredEdge.isWeak())
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continue;
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assert(PredSU->isBoundaryNode() || PredSU->NumSuccsLeft > 0);
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PredSU->setHeightToAtLeast(SU->getHeight() + PredEdge.getLatency());
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if (!PredSU->isBoundaryNode() && --PredSU->NumSuccsLeft == 0)
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PendingQueue.push_front(*new (Alloc.Allocate()) Candidate(PredSU));
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}
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}
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std::vector<const SUnit*>
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GCNILPScheduler::schedule(ArrayRef<const SUnit*> BotRoots,
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const ScheduleDAG &DAG) {
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auto &SUnits = const_cast<ScheduleDAG&>(DAG).SUnits;
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std::vector<SUnit> SUSavedCopy;
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SUSavedCopy.resize(SUnits.size());
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// we cannot save only those fields we touch: some of them are private
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// so save units verbatim: this assumes SUnit should have value semantics
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for (const SUnit &SU : SUnits)
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SUSavedCopy[SU.NodeNum] = SU;
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SUNumbers.assign(SUnits.size(), 0);
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for (const SUnit &SU : SUnits)
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CalcNodeSethiUllmanNumber(&SU, SUNumbers);
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for (auto SU : BotRoots) {
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AvailQueue.push_back(
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*new (Alloc.Allocate()) Candidate(const_cast<SUnit*>(SU)));
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}
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releasePredecessors(&DAG.ExitSU);
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std::vector<const SUnit*> Schedule;
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Schedule.reserve(SUnits.size());
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while (true) {
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if (AvailQueue.empty() && !PendingQueue.empty()) {
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auto EarliestSU = std::min_element(
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PendingQueue.begin(), PendingQueue.end(),
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[=](const Candidate& C1, const Candidate& C2) {
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return C1.SU->getHeight() < C2.SU->getHeight();
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})->SU;
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advanceToCycle(std::max(CurCycle + 1, EarliestSU->getHeight()));
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}
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if (AvailQueue.empty())
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break;
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LLVM_DEBUG(dbgs() << "\n=== Picking candidate\n"
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"Ready queue:";
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for (auto &C
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: AvailQueue) dbgs()
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<< ' ' << C.SU->NodeNum;
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dbgs() << '\n';);
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auto C = pickCandidate();
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assert(C);
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AvailQueue.remove(*C);
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auto SU = C->SU;
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LLVM_DEBUG(dbgs() << "Selected "; DAG.dumpNode(*SU));
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advanceToCycle(SU->getHeight());
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releasePredecessors(SU);
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Schedule.push_back(SU);
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SU->isScheduled = true;
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}
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assert(SUnits.size() == Schedule.size());
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std::reverse(Schedule.begin(), Schedule.end());
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// restore units
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for (auto &SU : SUnits)
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SU = SUSavedCopy[SU.NodeNum];
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return Schedule;
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}
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namespace llvm {
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std::vector<const SUnit*> makeGCNILPScheduler(ArrayRef<const SUnit*> BotRoots,
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const ScheduleDAG &DAG) {
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GCNILPScheduler S;
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return S.schedule(BotRoots, DAG);
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}
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}
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