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AsmParser
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[AMDGPU][MC] Fix for sanitizer failure in 364645
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2019-06-28 15:22:47 +00:00 |
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Disassembler
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[AMDGPU] gfx1010 core wave32 changes
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2019-06-20 15:08:34 +00:00 |
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MCTargetDesc
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[AMDGPU][MC] Enabled constant expressions as operands of sendmsg
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2019-06-28 14:14:02 +00:00 |
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TargetInfo
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Revert CMake: Make most target symbols hidden by default
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2019-06-11 03:21:13 +00:00 |
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Utils
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[AMDGPU][MC] Fix 2 for sanitizer failure in 364645
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2019-06-28 16:28:46 +00:00 |
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AMDGPU.h
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[AMDGPU] gfx1010 wavefrontsize intrinsic folding
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2019-06-17 17:57:50 +00:00 |
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AMDGPU.td
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[AMDGPU] Fix for branch offset hardware workaround
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2019-06-26 17:34:57 +00:00 |
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AMDGPUAliasAnalysis.cpp
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[AliasAnalysis] Second prototype to cache BasicAA / anyAA state.
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2019-03-22 17:22:19 +00:00 |
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AMDGPUAliasAnalysis.h
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[AliasAnalysis] Second prototype to cache BasicAA / anyAA state.
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2019-03-22 17:22:19 +00:00 |
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AMDGPUAlwaysInlinePass.cpp
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AMDGPUAnnotateKernelFeatures.cpp
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AMDGPU: Handle "uniform-work-group-size" attribute (fix for RADV)
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2019-03-07 00:54:04 +00:00 |
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AMDGPUAnnotateUniformValues.cpp
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AMDGPUArgumentUsageInfo.cpp
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[AMDGPU] Packed thread ids in function call ABI
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2019-06-28 01:52:13 +00:00 |
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AMDGPUArgumentUsageInfo.h
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[AMDGPU] Packed thread ids in function call ABI
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2019-06-28 01:52:13 +00:00 |
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AMDGPUAsmPrinter.cpp
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[AMDGPU] Fix +DumpCode to print an entry label for the first function
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2019-06-27 08:19:28 +00:00 |
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AMDGPUAsmPrinter.h
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[AMDGPU] Fixed +DumpCode
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2019-05-14 16:17:14 +00:00 |
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AMDGPUAtomicOptimizer.cpp
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[AMDGPU] gfx1010 wave32 icmp/fcmp intrinsic changes for wave32
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2019-06-13 23:47:36 +00:00 |
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AMDGPUCallingConv.td
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AMDGPU: Fix not marking new gfx10 SGPRs as CSRs
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2019-05-21 23:23:05 +00:00 |
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AMDGPUCallLowering.cpp
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[GlobalISel] Accept multiple vregs in lowerFormalArgs
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2019-06-27 08:54:17 +00:00 |
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AMDGPUCallLowering.h
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[GlobalISel] Accept multiple vregs in lowerFormalArgs
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2019-06-27 08:54:17 +00:00 |
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AMDGPUCodeGenPrepare.cpp
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AMDGPUFeatures.td
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AMDGPU: Fix names for generation features
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2019-04-03 00:01:03 +00:00 |
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AMDGPUFixFunctionBitcasts.cpp
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AMDGPUFrameLowering.cpp
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AMDGPUFrameLowering.h
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AMDGPUGenRegisterBankInfo.def
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AMDGPUGISel.td
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[AMDGPU] predicate and feature refactoring
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2019-04-05 18:24:34 +00:00 |
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AMDGPUHSAMetadataStreamer.cpp
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[AMDGPU] Fix hidden argument metadata duplication for V3
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2019-04-23 14:31:17 +00:00 |
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AMDGPUHSAMetadataStreamer.h
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[AMDGPU] Switched HSA metadata to use MsgPackDocument
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2019-03-13 18:55:50 +00:00 |
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AMDGPUInline.cpp
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[AMDGPU] Don't constrain callees with inlinehint from inlining on MaxBB check
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2019-06-14 16:37:33 +00:00 |
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AMDGPUInstrInfo.cpp
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AMDGPUInstrInfo.h
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AMDGPUInstrInfo.td
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[AMDGPU] gfx1010 core wave32 changes
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2019-06-20 15:08:34 +00:00 |
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AMDGPUInstructions.td
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[AMDGPU] gfx1010 base changes for wave32
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2019-06-13 19:18:29 +00:00 |
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AMDGPUInstructionSelector.cpp
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AMDGPU/GlobalISel: Fix scc->vcc copy handling
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2019-07-01 13:22:07 +00:00 |
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AMDGPUInstructionSelector.h
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AMDGPU: Select G_SEXT/G_ZEXT/G_ANYEXT
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2019-06-25 13:18:11 +00:00 |
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AMDGPUISelDAGToDAG.cpp
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AMDGPU: Add intrinsics for DS GWS semaphore instructions
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2019-06-20 21:11:42 +00:00 |
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AMDGPUISelLowering.cpp
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[AMDGPU] Packed thread ids in function call ABI
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2019-06-28 01:52:13 +00:00 |
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AMDGPUISelLowering.h
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AMDGPU: Write LDS objects out as global symbols in code generation
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2019-06-25 11:52:30 +00:00 |
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AMDGPULegalizerInfo.cpp
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AMDGPU/GlobalISel: Convert to using Register
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2019-06-28 01:16:46 +00:00 |
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AMDGPULegalizerInfo.h
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AMDGPU/GlobalISel: Convert to using Register
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2019-06-28 01:16:46 +00:00 |
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AMDGPULibCalls.cpp
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[AMDGPU] gfx1010 wavefrontsize intrinsic folding
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2019-06-17 17:57:50 +00:00 |
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AMDGPULibFunc.cpp
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Delay initialization of three static global maps, NFC
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2019-03-28 17:33:41 +00:00 |
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AMDGPULibFunc.h
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AMDGPULowerIntrinsics.cpp
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AMDGPULowerKernelArguments.cpp
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AMDGPU: Consolidate some getGeneration checks
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2019-06-19 23:54:58 +00:00 |
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AMDGPULowerKernelAttributes.cpp
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AMDGPUMachineCFGStructurizer.cpp
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AMDGPUMachineFunction.cpp
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AMDGPUMachineFunction.h
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AMDGPUMachineModuleInfo.cpp
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AMDGPU: Add support for cross address space synchronization scopes
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2019-03-25 20:50:21 +00:00 |
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AMDGPUMachineModuleInfo.h
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AMDGPU: Add support for cross address space synchronization scopes
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2019-03-25 20:50:21 +00:00 |
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AMDGPUMacroFusion.cpp
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AMDGPUMacroFusion.h
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AMDGPUMCInstLower.cpp
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AMDGPU: Prepare for explicit absolute relocations in code generation
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2019-06-16 17:43:37 +00:00 |
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AMDGPUOpenCLEnqueuedBlockLowering.cpp
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AMDGPUPerfHintAnalysis.cpp
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AMDGPUPerfHintAnalysis.h
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AMDGPUPromoteAlloca.cpp
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AMDGPU: Fix iterator crash in AMDGPUPromoteAlloca
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2019-06-18 12:23:44 +00:00 |
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AMDGPUPropagateAttributes.cpp
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[AMDGPU] Pass to propagate ABI attributes from kernels to the functions
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2019-06-17 17:47:28 +00:00 |
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AMDGPUPTNote.h
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AMDGPURegAsmNames.inc.cpp
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[AMDGPU] gfx1010 sgpr register changes
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2019-04-24 17:28:30 +00:00 |
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AMDGPURegisterBankInfo.cpp
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AMDGPU/GlobalISel: RegBankSelect for WWM/WQM
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2019-07-01 13:30:12 +00:00 |
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AMDGPURegisterBankInfo.h
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AMDGPU/GlobalISel: Convert to using Register
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2019-06-28 01:16:46 +00:00 |
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AMDGPURegisterBanks.td
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AMDGPU: Select G_SEXT/G_ZEXT/G_ANYEXT
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2019-06-25 13:18:11 +00:00 |
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AMDGPURegisterInfo.cpp
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CodeGen: Introduce a class for registers
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2019-06-24 15:50:29 +00:00 |
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AMDGPURegisterInfo.h
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AMDGPURegisterInfo.td
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AMDGPURewriteOutArguments.cpp
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AMDGPUSearchableTables.td
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[AMDGPU] ImmArg and SourceOfDivergence for permlane/dpp
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2019-06-13 16:31:51 +00:00 |
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AMDGPUSubtarget.cpp
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[AMDGPU] Fix for branch offset hardware workaround
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2019-06-26 17:34:57 +00:00 |
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AMDGPUSubtarget.h
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[AMDGPU] Fix for branch offset hardware workaround
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2019-06-26 17:34:57 +00:00 |
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AMDGPUTargetMachine.cpp
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Rename ExpandISelPseudo->FinalizeISel, delay register reservation
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2019-06-19 00:25:39 +00:00 |
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AMDGPUTargetMachine.h
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MIR: Allow targets to serialize MachineFunctionInfo
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2019-03-14 22:54:43 +00:00 |
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AMDGPUTargetObjectFile.cpp
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AMDGPUTargetObjectFile.h
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AMDGPUTargetTransformInfo.cpp
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[AMDGPU] Call isLoopExiting for blocks in the loop.
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2019-07-01 12:36:44 +00:00 |
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AMDGPUTargetTransformInfo.h
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AMDGPU: Ignore subtarget for InferAddressSpaces
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2019-06-17 14:13:24 +00:00 |
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AMDGPUUnifyDivergentExitNodes.cpp
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Update phis in AMDGPUUnifyDivergentExitNodes
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2019-06-25 18:55:16 +00:00 |
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AMDGPUUnifyMetadata.cpp
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AMDILCFGStructurizer.cpp
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AMDKernelCodeT.h
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[AMDGPU] gfx1010 wave32 metadata
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2019-06-17 16:48:56 +00:00 |
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BUFInstructions.td
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[AMDGPU] hazard recognizer for fp atomic to s_denorm_mode
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2019-06-21 16:30:14 +00:00 |
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CaymanInstructions.td
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CMakeLists.txt
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[AMDGPU] Pass to propagate ABI attributes from kernels to the functions
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2019-06-17 17:47:28 +00:00 |
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DSInstructions.td
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AMDGPU: Add intrinsics for DS GWS semaphore instructions
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2019-06-20 21:11:42 +00:00 |
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EvergreenInstructions.td
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FLATInstructions.td
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[AMDGPU] hazard recognizer for fp atomic to s_denorm_mode
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2019-06-21 16:30:14 +00:00 |
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GCNDPPCombine.cpp
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AMDGPU: Change API for checking for exec modification
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2019-06-18 12:48:36 +00:00 |
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GCNHazardRecognizer.cpp
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[AMDGPU] hazard recognizer for fp atomic to s_denorm_mode
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2019-06-21 16:30:14 +00:00 |
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GCNHazardRecognizer.h
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[AMDGPU] hazard recognizer for fp atomic to s_denorm_mode
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2019-06-21 16:30:14 +00:00 |
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GCNILPSched.cpp
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GCNIterativeScheduler.cpp
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GCNIterativeScheduler.h
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GCNMinRegStrategy.cpp
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GCNNSAReassign.cpp
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AMDGPU: Check MRI for callee saved regs instead of TRI
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2019-06-26 13:39:29 +00:00 |
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GCNProcessors.td
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[AMDGPU] gfx1011/gfx1012 targets
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2019-06-14 00:33:31 +00:00 |
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GCNRegBankReassign.cpp
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AMDGPU: Check MRI for callee saved regs instead of TRI
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2019-06-26 13:39:29 +00:00 |
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GCNRegPressure.cpp
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[AMDGPU] Speed up live-in virtual register set computaion in GCNScheduleDAGMILive.
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2019-06-18 11:43:17 +00:00 |
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GCNRegPressure.h
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[AMDGPU] Speed up live-in virtual register set computaion in GCNScheduleDAGMILive.
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2019-06-18 11:43:17 +00:00 |
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GCNSchedStrategy.cpp
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[AMDGPU] Speed up live-in virtual register set computaion in GCNScheduleDAGMILive.
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2019-06-18 11:43:17 +00:00 |
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GCNSchedStrategy.h
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[AMDGPU] Speed up live-in virtual register set computaion in GCNScheduleDAGMILive.
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2019-06-18 11:43:17 +00:00 |
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LLVMBuild.txt
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[AMDGPU] Move InstPrinter files to MCTargetDesc. NFC
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2019-05-11 00:03:35 +00:00 |
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MIMGInstructions.td
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[AMDGPU] hazard recognizer for fp atomic to s_denorm_mode
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2019-06-21 16:30:14 +00:00 |
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R600.td
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R600AsmPrinter.cpp
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R600AsmPrinter.h
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R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp
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R600Defines.h
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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R600FrameLowering.cpp
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R600FrameLowering.h
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R600InstrFormats.td
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R600InstrInfo.cpp
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R600InstrInfo.cpp - Add getTransSwizzle assert for the swizzle op index. NFCI.
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2019-05-08 10:39:56 +00:00 |
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R600InstrInfo.h
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R600Instructions.td
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R600ISelLowering.cpp
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[TargetLowering] Add MachineMemOperand::Flags to allowsMemoryAccess tests (PR42123)
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2019-06-12 17:14:03 +00:00 |
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R600ISelLowering.h
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[TargetLowering] Add MachineMemOperand::Flags to allowsMemoryAccess tests (PR42123)
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2019-06-12 17:14:03 +00:00 |
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
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R600MachineScheduler.h
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R600OpenCLImageTypeLoweringPass.cpp
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R600OptimizeVectorRegisters.cpp
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R600: Fix unconditional return in loop
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2019-05-20 16:22:11 +00:00 |
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R600Packetizer.cpp
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CodeGen: Introduce a class for registers
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2019-06-24 15:50:29 +00:00 |
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R600Processors.td
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AMDGPU: Fix names for generation features
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2019-04-03 00:01:03 +00:00 |
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R600RegisterInfo.cpp
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CodeGen: Introduce a class for registers
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2019-06-24 15:50:29 +00:00 |
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R600RegisterInfo.h
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CodeGen: Introduce a class for registers
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2019-06-24 15:50:29 +00:00 |
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R600RegisterInfo.td
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R600Schedule.td
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R700Instructions.td
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SIAddIMGInit.cpp
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SIAnnotateControlFlow.cpp
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[AMDGPU] gfx1010 wave32 icmp/fcmp intrinsic changes for wave32
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2019-06-13 23:47:36 +00:00 |
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SIDefines.h
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[AMDGPU][MC] Enabled constant expressions as operands of sendmsg
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2019-06-28 14:14:02 +00:00 |
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SIFixSGPRCopies.cpp
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[AMDGPU] Partial revert for the ba447bae7448435c9986eece0811da1423972fdd
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2019-06-06 21:13:02 +00:00 |
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SIFixupVectorISel.cpp
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[AMDGPU] gfx1010 VMEM and SMEM implementation
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2019-04-30 22:08:23 +00:00 |
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SIFixVGPRCopies.cpp
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SIFoldOperands.cpp
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AMDGPU: Write LDS objects out as global symbols in code generation
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2019-06-25 11:52:30 +00:00 |
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SIFormMemoryClauses.cpp
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[AMDGPU] Added target-specific attribute amdgpu-max-memory-clause
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2019-05-30 18:46:34 +00:00 |
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SIFrameLowering.cpp
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[AMDGPU] Fix Livereg computation during epilogue insertion
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2019-06-26 20:35:18 +00:00 |
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SIFrameLowering.h
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Describe stack-id as an enum
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2019-06-17 09:13:29 +00:00 |
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SIInsertSkips.cpp
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[AMDGPU] gfx10 conditional registers handling
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2019-06-16 17:13:09 +00:00 |
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SIInsertWaitcnts.cpp
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AMDGPU: Add intrinsics for DS GWS semaphore instructions
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2019-06-20 21:11:42 +00:00 |
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SIInstrFormats.td
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[AMDGPU] hazard recognizer for fp atomic to s_denorm_mode
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2019-06-21 16:30:14 +00:00 |
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SIInstrInfo.cpp
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AMDGPU: Write LDS objects out as global symbols in code generation
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2019-06-25 11:52:30 +00:00 |
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SIInstrInfo.h
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AMDGPU: Fold frame index into MUBUF
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2019-06-24 14:53:56 +00:00 |
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SIInstrInfo.td
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[AMDGPU] Fix for branch offset hardware workaround
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2019-06-26 17:34:57 +00:00 |
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SIInstructions.td
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AMDGPU: Write LDS objects out as global symbols in code generation
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2019-06-25 11:52:30 +00:00 |
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SIISelLowering.cpp
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[AMDGPU] Packed thread ids in function call ABI
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2019-06-28 01:52:13 +00:00 |
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SIISelLowering.h
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AMDGPU: Insert mem_viol check loop around GWS pre-GFX9
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2019-06-20 20:54:32 +00:00 |
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SILoadStoreOptimizer.cpp
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[AMDGPU] gfx10 conditional registers handling
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2019-06-16 17:13:09 +00:00 |
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SILowerControlFlow.cpp
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CodeGen: Introduce a class for registers
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2019-06-24 15:50:29 +00:00 |
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SILowerI1Copies.cpp
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AMDGPU: Make fixing i1 copies robust against re-ordering
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2019-06-27 16:56:44 +00:00 |
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SIMachineFunctionInfo.cpp
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AMDGPU: Check MRI for callee saved regs instead of TRI
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2019-06-26 13:39:29 +00:00 |
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SIMachineFunctionInfo.h
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[AMDGPU] Removed dead SIMachineFunctionInfo::getWorkItemIDVGPR()
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2019-06-25 18:33:53 +00:00 |
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SIMachineScheduler.cpp
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[CodeGen] Add "const" to MachineInstr::mayAlias
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2019-04-19 09:08:38 +00:00 |
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SIMachineScheduler.h
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SIMemoryLegalizer.cpp
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[AMDGPU] gfx1010 memory legalizer
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2019-05-06 21:57:02 +00:00 |
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SIModeRegister.cpp
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[SIMode] Fix typo in Status constructor
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2019-05-08 10:24:22 +00:00 |
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SIOptimizeExecMasking.cpp
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[AMDGPU] gfx10 conditional registers handling
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2019-06-16 17:13:09 +00:00 |
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SIOptimizeExecMaskingPreRA.cpp
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[AMDGPU] gfx10 conditional registers handling
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2019-06-16 17:13:09 +00:00 |
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SIPeepholeSDWA.cpp
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[AMDGPU] gfx10 conditional registers handling
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2019-06-16 17:13:09 +00:00 |
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SIPreAllocateWWMRegs.cpp
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[AMDGPU] Pre-allocate WWM registers to reduce VGPR pressure.
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2019-04-01 15:19:52 +00:00 |
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SIProgramInfo.h
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[AMDGPU] gfx1010 s_code_end generation
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2019-05-03 21:26:39 +00:00 |
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SIRegisterInfo.cpp
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AMDGPU/GlobalISel: Fix scc->vcc copy handling
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2019-07-01 13:22:07 +00:00 |
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SIRegisterInfo.h
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AMDGPU/GlobalISel: Select G_TRUNC
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2019-06-24 18:02:18 +00:00 |
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SIRegisterInfo.td
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[AMDGPU] gfx1010 core wave32 changes
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2019-06-20 15:08:34 +00:00 |
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SISchedule.td
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[AMDGPU] Add gfx1010 target definitions
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2019-04-24 17:03:15 +00:00 |
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SIShrinkInstructions.cpp
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AMDGPU: Write LDS objects out as global symbols in code generation
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2019-06-25 11:52:30 +00:00 |
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SIWholeQuadMode.cpp
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[AMDGPU] gfx10 conditional registers handling
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2019-06-16 17:13:09 +00:00 |
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SMInstructions.td
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AMDGPU/GFX10: Support DLC bit in llvm.amdgcn.s.buffer.load intrinsic
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2019-06-16 17:14:12 +00:00 |
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SOPInstructions.td
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[AMDGPU] Fix for branch offset hardware workaround
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2019-06-26 17:34:57 +00:00 |
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VIInstrFormats.td
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VIInstructions.td
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VOP1Instructions.td
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[AMDGPU] Allow any value in unused src0 field in v_nop
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2019-06-24 17:35:20 +00:00 |
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VOP2Instructions.td
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[AMDGPU] gfx1010 core wave32 changes
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2019-06-20 15:08:34 +00:00 |
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VOP3Instructions.td
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[AMDGPU] gfx1010 core wave32 changes
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2019-06-20 15:08:34 +00:00 |
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VOP3PInstructions.td
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AMDGPU: Undo sub x, c canonicalization for v2i16
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2019-06-19 23:37:43 +00:00 |
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VOPCInstructions.td
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[AMDGPU] gfx1010 core wave32 changes
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2019-06-20 15:08:34 +00:00 |
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VOPInstructions.td
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[AMDGPU] gfx1010 dpp16 and dpp8
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2019-06-12 18:02:41 +00:00 |
