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030525f5bf
For NVPTX, try to use 32-bit division instead of 64-bit division when the dividend and divisor fit in 32 bits. This speeds up some internal benchmarks significantly. The underlying reason is that many index computations are carried out in 64-bits but never actually exceed the capacity of a 32-bit word. llvm-svn: 244684
81 lines
1.7 KiB
LLVM
81 lines
1.7 KiB
LLVM
; RUN: llc < %s -march=nvptx -mcpu=sm_35 | FileCheck %s
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; 64-bit divides and rems should be split into a fast and slow path where
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; the fast path uses a 32-bit operation.
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define void @sdiv64(i64 %a, i64 %b, i64* %retptr) {
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; CHECK-LABEL: sdiv64(
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; CHECK: div.s64
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; CHECK: div.u32
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; CHECK: ret
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%d = sdiv i64 %a, %b
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store i64 %d, i64* %retptr
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ret void
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}
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define void @udiv64(i64 %a, i64 %b, i64* %retptr) {
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; CHECK-LABEL: udiv64(
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; CHECK: div.u64
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; CHECK: div.u32
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; CHECK: ret
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%d = udiv i64 %a, %b
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store i64 %d, i64* %retptr
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ret void
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}
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define void @srem64(i64 %a, i64 %b, i64* %retptr) {
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; CHECK-LABEL: srem64(
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; CHECK: rem.s64
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; CHECK: rem.u32
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; CHECK: ret
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%d = srem i64 %a, %b
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store i64 %d, i64* %retptr
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ret void
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}
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define void @urem64(i64 %a, i64 %b, i64* %retptr) {
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; CHECK-LABEL: urem64(
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; CHECK: rem.u64
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; CHECK: rem.u32
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; CHECK: ret
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%d = urem i64 %a, %b
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store i64 %d, i64* %retptr
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ret void
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}
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define void @sdiv32(i32 %a, i32 %b, i32* %retptr) {
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; CHECK-LABEL: sdiv32(
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; CHECK: div.s32
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; CHECK-NOT: div.
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%d = sdiv i32 %a, %b
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store i32 %d, i32* %retptr
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ret void
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}
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define void @udiv32(i32 %a, i32 %b, i32* %retptr) {
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; CHECK-LABEL: udiv32(
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; CHECK: div.u32
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; CHECK-NOT: div.
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%d = udiv i32 %a, %b
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store i32 %d, i32* %retptr
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ret void
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}
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define void @srem32(i32 %a, i32 %b, i32* %retptr) {
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; CHECK-LABEL: srem32(
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; CHECK: rem.s32
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; CHECK-NOT: rem.
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%d = srem i32 %a, %b
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store i32 %d, i32* %retptr
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ret void
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}
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define void @urem32(i32 %a, i32 %b, i32* %retptr) {
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; CHECK-LABEL: urem32(
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; CHECK: rem.u32
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; CHECK-NOT: rem.
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%d = urem i32 %a, %b
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store i32 %d, i32* %retptr
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ret void
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}
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