RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-29 23:12:55 +01:00
Code Issues Projects Releases Wiki Activity
186b5f0887
llvm-mirror/lib/Target/SparcV8
History
Chris Lattner 769e683663 treat conditional branches the same way as conditional moves (giving them 
an operand that contains the condcode), making things significantly simpler.

llvm-svn: 25840
2006-01-31 06:56:30 +00:00
..
.cvsignore ignore generated files 2005-09-07 23:47:44 +00:00
DelaySlotFiller.cpp Remove trailing whitespace 2005-04-21 23:30:14 +00:00
FPMover.cpp If the target has V9 instructions, this pass is a noop, don't bother 2006-01-30 05:51:14 +00:00
Makefile Add trivial subtarget support 2006-01-26 06:51:21 +00:00
README.txt First step towards V9 instructions in the V8 backend, two conditional move 2006-01-30 05:35:57 +00:00
SparcV8.h treat conditional branches the same way as conditional moves (giving them 2006-01-31 06:56:30 +00:00
SparcV8.td Subtarget feature can now set any variable to any value 2006-01-27 08:09:42 +00:00
SparcV8AsmPrinter.cpp compactify all of the integer conditional moves into one instruction that takes 2006-01-31 06:49:09 +00:00
SparcV8InstrFormats.td Push ops list, asm string, and pattern all the way up to InstV8. Move the 2005-12-18 08:21:00 +00:00
SparcV8InstrInfo.cpp Tighten up some checks 2005-12-18 06:40:34 +00:00
SparcV8InstrInfo.h Remove trailing whitespace 2005-04-21 23:30:14 +00:00
SparcV8InstrInfo.td treat conditional branches the same way as conditional moves (giving them 2006-01-31 06:56:30 +00:00
SparcV8ISelDAGToDAG.cpp treat conditional branches the same way as conditional moves (giving them 2006-01-31 06:56:30 +00:00
SparcV8RegisterInfo.cpp New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace 2006-01-09 18:28:21 +00:00
SparcV8RegisterInfo.h Pass extra regclasses into spilling code 2005-09-30 01:29:42 +00:00
SparcV8RegisterInfo.td Reserve G1 for frame offset stuff and use it to handle large stack frames. 2005-12-20 07:56:31 +00:00
SparcV8Subtarget.cpp Two changes: 2006-01-30 04:57:43 +00:00
SparcV8Subtarget.h Rest of subtarget support, remove references to ppc 2006-01-26 07:22:22 +00:00
SparcV8TargetMachine.cpp Add trivial subtarget support 2006-01-26 06:51:21 +00:00
SparcV8TargetMachine.h Add trivial subtarget support 2006-01-26 06:51:21 +00:00

README.txt 

To-do
-----

* Keep the address of the constant pool in a register instead of forming its
  address all of the time.
* We can fold small constant offsets into the %hi/%lo references to constant
  pool addresses as well.
* When in V9 mode, register allocate %icc[0-3].