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9ffa9369b0
Registers used in any address (as well as in a few other contexts) have special semantics when a "zero" register is used, which is why the back-end defines extra register classes ADDR32, ADDR64 etc to be used to prevent the register allocator from using %r0 there. However, when writing assembler code "by hand", you sometimes need to trigger that special semantics. However, currently the AsmParser will reject %r0 in those places. In some cases it may be possible to write that instruction differently - but in others it is currently not possible at all. This check in AsmParser simply seems overly strict, so this patch just removes the check completely. This brings the behaviour of AsmParser in line with the GNU assembler as well. Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=45092 |
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| .. | ||
| asm-match.s | ||
| directive-insn.s | ||
| fixups-zEC12.s | ||
| fixups.s | ||
| insn-bad-z13.s | ||
| insn-bad-z14.s | ||
| insn-bad-z15.s | ||
| insn-bad-z196.s | ||
| insn-bad-zEC12.s | ||
| insn-bad.s | ||
| insn-good-z13.s | ||
| insn-good-z14.s | ||
| insn-good-z15.s | ||
| insn-good-z196.s | ||
| insn-good-zEC12.s | ||
| insn-good.s | ||
| invalid-instructions-spellcheck.s | ||
| lit.local.cfg | ||
| regs-bad.s | ||
| regs-good.s | ||
| tokens.s | ||
| word.s | ||