1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-25 22:12:57 +02:00
llvm-mirror/test/CodeGen
Matt Arsenault f90bcc3b30 AMDGPU: Preserve undef flag on vcc when shrinking v_cndmask_b32
The implicit operand is added by the initial instruction construction,
so this was adding an additional vcc use. The original one
was missing the undef flag the original condition had,
so the verifier would complain.

llvm-svn: 273182
2016-06-20 18:34:00 +00:00
..
AArch64 [AARCH64] Add support for Broadcom Vulcan 2016-06-20 11:13:31 +00:00
AMDGPU AMDGPU: Preserve undef flag on vcc when shrinking v_cndmask_b32 2016-06-20 18:34:00 +00:00
ARM Use shouldAssumeDSOLocal. 2016-06-20 17:45:33 +00:00
BPF
Generic Move CodeGen test from Generic to X86 specific directory 2016-06-10 19:14:01 +00:00
Hexagon
Inputs
Lanai
Mips [mips] Emit a JALR with $rd equal to $zero, instead of a JR in MIPS32R6. 2016-06-18 15:39:43 +00:00
MIR [mips][mips16] Fix machine verifier errors about incorrect register classes on load/stores. 2016-06-16 10:20:59 +00:00
MSP430
NVPTX [NVPTX] Add intrinsics for shfl instructions. 2016-06-09 20:04:08 +00:00
PowerPC IR: Introduce local_unnamed_addr attribute. 2016-06-14 21:01:22 +00:00
SPARC [SPARC[ Correcting out-of-date unit tests checked in as part of r273108 2016-06-19 12:52:39 +00:00
SystemZ [SelectionDAG] Don't treat library calls specially if marked with nobuiltin. 2016-06-17 20:24:07 +00:00
Thumb [Thumb] Fix off-by-one error in r272007 2016-06-14 13:33:07 +00:00
Thumb2 Don't print (PLT) on arm. 2016-06-16 16:09:53 +00:00
WebAssembly
WinEH
X86 [X86][F16C] Added half <-> double conversion tests 2016-06-20 12:51:55 +00:00
XCore