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arm-tests.txt
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ARM VLDR/VSTR instructions don't need a size suffix.
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2011-11-14 23:03:21 +00:00 |
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basic-arm-instructions.txt
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Revert r142618, r142622, and r142624, which were based on an incorrect reading of the ARMv7 docs.
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2011-10-20 22:23:58 +00:00 |
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fp-encoding.txt
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ARM VLDR/VSTR instructions don't need a size suffix.
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2011-11-14 23:03:21 +00:00 |
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invalid-Bcc-thumb.txt
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invalid-BFI-arm.txt
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invalid-CPS2p-arm.txt
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invalid-CPS3p-arm.txt
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Reapply r143202, with a manual decoding hook for SWP. This change inadvertantly exposed a decoding ambiguity between SWP and CPS that the auto-generated decoder can't handle.
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2011-10-28 18:02:13 +00:00 |
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invalid-DMB-thumb.txt
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invalid-DSB-arm.txt
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invalid-IT-CBNZ-thumb.txt
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Soft fail CBZ/CBNZ in the disassembler if they appear inside an IT block.
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2011-09-08 22:42:49 +00:00 |
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invalid-IT-CC15.txt
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Change ARMInstPrinter::printPredicateOperand() so it will not abort if it
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2012-03-01 22:13:02 +00:00 |
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invalid-IT-thumb.txt
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Add a testcase for r138625.
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2011-08-26 06:45:08 +00:00 |
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invalid-LDC-form-arm.txt
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invalid-LDM-thumb.txt
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LDM writeback is not allowed if Rn is in the target register list.
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2011-09-09 23:13:33 +00:00 |
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invalid-LDR_POST-arm.txt
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invalid-LDR_PRE-arm.txt
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invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons. We were failing to specify enough fixed bits of LDR_PRE/LDRB_PRE, resulting in decoding conflicts. Separate them into immediate vs. register versions, allowing us to specify the necessary fixed bits. This in turn results in the test being decoded properly, and being rejected as UNPREDICTABLE rather than a hard failure.
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2011-08-26 20:43:14 +00:00 |
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invalid-LDRB_POST-arm.txt
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invalid-LDRD_PRE-thumb.txt
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Thumb2 assembly parsing and encoding for LDRD(immediate).
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2011-09-08 22:07:06 +00:00 |
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invalid-LDRD-arm.txt
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invalid-LDRrs-arm.txt
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invalid-LDRT-arm.txt
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invalid-LSL-regform.txt
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invalid-MCR-arm.txt
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invalid-MOVr-arm.txt
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invalid-MOVs-arm.txt
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invalid-MOVs-LSL-arm.txt
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invalid-MOVTi16-arm.txt
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invalid-MSRi-arm.txt
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invalid-RFEorLDMIA-arm.txt
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invalid-RSC-arm.txt
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invalid-SBFX-arm.txt
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invalid-SMLAD-arm.txt
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invalid-SRS-arm.txt
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invalid-SSAT-arm.txt
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invalid-STMIA_UPD-thumb.txt
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invalid-STRBrs-arm.txt
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invalid-SXTB-arm.txt
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invalid-t2Bcc-thumb.txt
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invalid-t2LDRBT-thumb.txt
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invalid-t2LDREXD-thumb.txt
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Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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2011-09-07 19:42:28 +00:00 |
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invalid-t2LDRSHi8-thumb.txt
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invalid-t2LDRSHi12-thumb.txt
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invalid-t2PUSH-thumb.txt
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Thumb2 POP's don't allow the PC as an operand, and PUSH's don't allow the SP either.
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2011-09-12 21:28:46 +00:00 |
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invalid-t2STR_POST-thumb.txt
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invalid-t2STRD_PRE-thumb.txt
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Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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2011-09-07 19:42:28 +00:00 |
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invalid-t2STREXB-thumb.txt
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Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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2011-09-07 19:42:28 +00:00 |
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invalid-t2STREXD-thumb.txt
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invalid-UMAAL-arm.txt
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invalid-UQADD8-arm.txt
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invalid-VLD1DUPq8_UPD-arm.txt
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Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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2011-09-07 19:42:28 +00:00 |
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invalid-VLD3DUPd32_UPD-thumb.txt
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invalid-VLDMSDB_UPD-arm.txt
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invalid-VQADD-arm.txt
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Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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2011-09-07 19:42:28 +00:00 |
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invalid-VST2b32_UPD-arm.txt
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Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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2011-09-07 19:42:28 +00:00 |
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lit.local.cfg
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Replace all instances of dg.exp file with lit.local.cfg, since all tests are run with LIT now and now Dejagnu. dg.exp is no longer needed.
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2012-02-16 06:28:33 +00:00 |
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memory-arm-instructions.txt
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neon-tests.txt
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Simplify some uses of utohexstr.
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2011-11-07 21:00:59 +00:00 |
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neon.txt
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Fix a bug in the ARM disassembly of the neon VLD2 all lanes instruction.
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2012-03-06 18:33:12 +00:00 |
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neont2.txt
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Fix a bug in the ARM disassembly of the neon VLD2 all lanes instruction.
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2012-03-06 18:33:12 +00:00 |
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thumb1.txt
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Support an extension of ARM asm syntax to allow immediate operands to ADR instructions. This is helpful for disassembler testing, and indeed exposed a disassembler bug that is also fixed here.
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2011-08-26 18:09:22 +00:00 |
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thumb2.txt
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Fix an incorrect decoder test.
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2011-09-26 23:08:34 +00:00 |
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thumb-MSR-MClass.txt
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Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit.
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2011-09-28 14:21:38 +00:00 |
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thumb-printf.txt
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Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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2011-09-07 19:42:28 +00:00 |
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thumb-tests.txt
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Thumb2 assembly parsing and encoding for LDC/STC.
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2011-10-12 20:54:17 +00:00 |
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unpredictables-thumb.txt
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Teach the MC and disassembler about SoftFail, and hook it up to UNPREDICTABLE on ARM. Wire this to tBLX in order to provide test coverage.
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2012-02-09 10:56:31 +00:00 |
