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llvm-mirror/test/MC/RISCV/rv64d-invalid.s
Alex Bradbury 5d0bea5023 [RISCV] Add missed tests for RV64D MC layer support
Add tests missed in r320029.

llvm-svn: 320031
2017-12-07 11:05:38 +00:00

12 lines
644 B
ArmAsm

# RUN: not llvm-mc -triple riscv64 -mattr=+d < %s 2>&1 | FileCheck %s
# Integer registers where FP regs are expected
fcvt.l.d ft0, a0 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
fcvt.lu.d ft1, a1 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
fmv.x.d ft2, a2 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction
# FP registers where integer regs are expected
fcvt.d.l a3, ft3 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
fcvt.d.lu a4, ft4 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
fmv.d.x a5, ft5 # CHECK: :[[@LINE]]:9: error: invalid operand for instruction