1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
llvm-mirror/test/CodeGen/Hexagon/target-flag-ext.mir
Puyan Lotfi d4c615be8c Followup on Proposal to move MIR physical register namespace to '$' sigil.
Discussed here:

http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html

In preparation for adding support for named vregs we are changing the sigil for
physical registers in MIR to '$' from '%'. This will prevent name clashes of
named physical register with named vregs.

llvm-svn: 323922
2018-01-31 22:04:26 +00:00

25 lines
831 B
YAML

# RUN: llc -march=hexagon -run-pass hexagon-packetizer -o - %s | FileCheck %s
---
name: fred
tracksRegLiveness: true
body: |
bb.0:
; Check that all these instructions go in the same packet. This is to
; make sure that a target flag (other than HMOTF_ConstExtend) on an
; operand will not be interpreted as a constant-extender flag.
; The combination used below (pcrel + 0) does not technically make sense,
; but combinations that do make sense require constant extending, so
; testing this is not possible otherwise.
; CHECK: BUNDLE
; CHECK-DAG: $r0 = A2_tfrsi
; CHECK-DAG: $r1 = A2_tfrsi
; CHECK-DAG: $r2 = A2_tfrsi
; CHECK: }
$r0 = A2_tfrsi target-flags (hexagon-pcrel) 0
$r1 = A2_tfrsi target-flags (hexagon-pcrel) 0
$r2 = A2_tfrsi target-flags (hexagon-pcrel) 0
...