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llvm-mirror/test/MC/Disassembler/Mips/mips32r6
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Petar Jovanovic 6ce379ed1b Reland r306095: [mips] Fix reg positions in the aui/daui instructions 
After fixing (r306173) a failing test in the lld test suite (r306173),
reland r306095.

Original commit message:

  [mips] Fix register positions in the aui/daui instructions

  Swapped the position of the rt and rs register in the aui/daui
  instructions for mips32r6 and mips64r6. With this change, the format of
  the generated instructions complies with specifications and GCC.
  Patch by Milos Stojanovic.

llvm-svn: 306174
2017-06-23 22:37:19 +00:00
..
valid-mips32r6-el.txt Reland r306095: [mips] Fix reg positions in the aui/daui instructions 2017-06-23 22:37:19 +00:00
valid-mips32r6.txt Reland r306095: [mips] Fix reg positions in the aui/daui instructions 2017-06-23 22:37:19 +00:00
valid-xfail-mips32r6.txt [Mips][Disassembler] When disassembler meets cache/pref instructions for r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method for R6 CACHE_HINT_DESC class that properly handles decoding of these instructions. 2015-01-29 11:33:41 +00:00