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llvm-mirror/test/MC/Disassembler
Zhan Jun Liau e61701ff16 [SystemZ] Add support for missing instructions
Summary:
Add support to allow clang integrated assembler to recognize some
missing instructions, for openssl.

Instructions are:
LM, LMH, LMY, STM, STMH, STMY, ICM, ICMH, ICMY, SLA, SLAK, TML, TMH, EX, EXRL.

Reviewers: uweigand

Subscribers: koriakin, llvm-commits

Differential Revision: http://reviews.llvm.org/D22050

llvm-svn: 274869
2016-07-08 16:18:40 +00:00
..
AArch64 AArch64: TableGenerate system instruction operands. 2016-07-05 21:23:04 +00:00
AMDGPU [AMDGPU] fix ds_swizzle_b32 opcode for VI (bz 28371) 2016-07-08 15:12:46 +00:00
ARM RAS extensions are part of ARMv8.2-A. This change enables them by introducing a 2016-06-03 14:03:27 +00:00
Hexagon [Hexagon] Treat all conditional branches as predicted (not-taken by default) 2016-05-09 18:22:07 +00:00
Lanai [lanai] Add Lanai backend. 2016-03-28 13:09:54 +00:00
Mips [mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions 2016-06-27 08:23:28 +00:00
PowerPC This reverts commit r265505. 2016-04-28 20:00:42 +00:00
Sparc This change adds co-processor condition branching and conditional traps to the Sparc back-end. 2016-03-09 18:20:21 +00:00
SystemZ [SystemZ] Add support for missing instructions 2016-07-08 16:18:40 +00:00
X86 Add new flag and intrinsic support for MWAITX and MONITORX instructions 2016-05-18 11:59:12 +00:00
XCore Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00