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llvm-mirror/test/MC
Renato Golin 5e4f70ea56 [ARM] ARM mov InstAlias for MOVW lacks HasV6T2
The movw instruction is only available in ARM state for V6T2 and above.
The MOVi16 instruction has requirement HasV6T2 but the InstAlias
for mov rd, imm where the operand is imm0_65535_expr:$imm does not.

This means that movw can incorrectly be used in ARMv4 and ARMv5 by
writing mov rd, 0x1234. The simple fix is to the requirement HasV6T2
to the InstAlias. Tests added to not-armv4.s.

Patch by Peter Smith.

llvm-svn: 269761
2016-05-17 13:05:28 +00:00
..
AArch64 add support for -print-imm-hex for AArch64 2016-05-13 18:00:09 +00:00
AMDGPU [AMDGPU][llvm-mc] Add support for sendmsg(...) syntax. 2016-05-06 17:48:48 +00:00
ARM [ARM] ARM mov InstAlias for MOVW lacks HasV6T2 2016-05-17 13:05:28 +00:00
AsmParser [LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC. 2016-04-19 23:51:52 +00:00
COFF [MC] Create unique .pdata sections for every .text section 2016-05-02 23:22:18 +00:00
Disassembler [mips][microMIPS] Implement BEQZC and BNEZC instructions 2016-05-17 11:10:15 +00:00
ELF [MC/ELF] Make the relaxation test more interesting. 2016-04-24 01:08:35 +00:00
Hexagon [Hexagon] Treat all conditional branches as predicted (not-taken by default) 2016-05-09 18:22:07 +00:00
Lanai [lanai] isBrImm should accept any non-constant immediate. 2016-03-31 17:58:55 +00:00
MachO CodeGen: Use PLT relocations for relative references to unnamed_addr functions. 2016-04-22 20:40:10 +00:00
Markup
Mips [mips][microMIPS] Implement BEQZC and BNEZC instructions 2016-05-17 11:10:15 +00:00
PowerPC This reverts commit r265505. 2016-04-28 20:00:42 +00:00
Sparc [Sparc][LEON] Add LEON-specific CASA instruction. 2016-05-16 11:02:00 +00:00
SystemZ [SystemZ] Support LRVH and STRVH opcodes 2016-05-16 20:32:22 +00:00
X86 [AVX512] VPACKUSWB/VPACKSSWB should not be encoded with EVEX.W=1. While there fix the execution domain for VPACKSSDW/VPACKUSDW. 2016-05-01 17:38:32 +00:00