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llvm-mirror/test/CodeGen/SPARC/ctpop.ll
Jakob Stoklund Olesen 6804208a8e Only generate the popc instruction for SPARC CPUs that implement it.
The popc instruction is defined in the SPARCv9 instruction set
architecture, but it was emulated on CPUs older than Niagara 2.

llvm-svn: 200131
2014-01-26 06:09:59 +00:00

32 lines
1.1 KiB
LLVM

; RUN: llc < %s -march=sparc -mattr=-v9 | FileCheck %s -check-prefix=V8
; RUN: llc < %s -march=sparc -mattr=+v9,+popc | FileCheck %s -check-prefix=V9
; RUN: llc < %s -march=sparc -mcpu=v9 | FileCheck %s -check-prefix=V8
; RUN: llc < %s -march=sparc -mcpu=ultrasparc | FileCheck %s -check-prefix=V8
; RUN: llc < %s -march=sparc -mcpu=ultrasparc3 | FileCheck %s -check-prefix=V8
; RUN: llc < %s -march=sparc -mcpu=niagara | FileCheck %s -check-prefix=V8
; RUN: llc < %s -march=sparc -mcpu=niagara2 | FileCheck %s -check-prefix=V9
; RUN: llc < %s -march=sparc -mcpu=niagara3 | FileCheck %s -check-prefix=V9
; RUN: llc < %s -march=sparc -mcpu=niagara4 | FileCheck %s -check-prefix=V9
; RUN: llc < %s -march=sparcv9 -mattr=+popc | FileCheck %s -check-prefix=SPARC64
declare i32 @llvm.ctpop.i32(i32)
; V8-LABEL: test
; V8-NOT: popc
; V9-LABEL: test
; V9: srl %o0, 0, %o0
; V9-NEXT: retl
; V9-NEXT: popc %o0, %o0
; SPARC64-LABEL: test
; SPARC64: srl %o0, 0, %o0
; SPARC64: retl
; SPARC64: popc %o0, %o0
define i32 @test(i32 %X) {
%Y = call i32 @llvm.ctpop.i32( i32 %X ) ; <i32> [#uses=1]
ret i32 %Y
}