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9cdd47faf1
In case if SI_KILL is in between of the SI_IF and SI_END_CF we need to preserve the bits actually flipped by if rather then restoring the original mask. Differential Revision: https://reviews.llvm.org/D36299 llvm-svn: 310031
72 lines
1.6 KiB
LLVM
72 lines
1.6 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; GCN-LABEL: {{^}}if_with_kill:
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; GCN: s_and_saveexec_b64 [[SAVEEXEC:s\[[0-9:]+\]]],
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; GCN-NEXT: s_xor_b64 s[{{[0-9:]+}}], exec, [[SAVEEXEC]]
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define amdgpu_ps void @if_with_kill(i32 %arg) {
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.entry:
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%cmp = icmp eq i32 %arg, 32
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br i1 %cmp, label %then, label %endif
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then:
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tail call void @llvm.AMDGPU.kilp()
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br label %endif
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endif:
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ret void
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}
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; GCN-LABEL: {{^}}if_with_loop_kill_after:
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; GCN: s_and_saveexec_b64 [[SAVEEXEC:s\[[0-9:]+\]]],
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; GCN-NEXT: s_xor_b64 s[{{[0-9:]+}}], exec, [[SAVEEXEC]]
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define amdgpu_ps void @if_with_loop_kill_after(i32 %arg) {
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.entry:
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%cmp = icmp eq i32 %arg, 32
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br i1 %cmp, label %then, label %endif
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then:
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%sub = sub i32 %arg, 1
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br label %loop
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loop:
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%ind = phi i32 [%sub, %then], [%dec, %loop]
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%dec = sub i32 %ind, 1
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%cc = icmp ne i32 %ind, 0
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br i1 %cc, label %loop, label %break
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break:
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tail call void @llvm.AMDGPU.kilp()
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br label %endif
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endif:
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ret void
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}
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; GCN-LABEL: {{^}}if_with_kill_inside_loop:
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; GCN: s_and_saveexec_b64 [[SAVEEXEC:s\[[0-9:]+\]]],
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; GCN-NEXT: s_xor_b64 s[{{[0-9:]+}}], exec, [[SAVEEXEC]]
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define amdgpu_ps void @if_with_kill_inside_loop(i32 %arg) {
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.entry:
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%cmp = icmp eq i32 %arg, 32
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br i1 %cmp, label %then, label %endif
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then:
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%sub = sub i32 %arg, 1
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br label %loop
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loop:
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%ind = phi i32 [%sub, %then], [%dec, %loop]
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%dec = sub i32 %ind, 1
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%cc = icmp ne i32 %ind, 0
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tail call void @llvm.AMDGPU.kilp()
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br i1 %cc, label %loop, label %break
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break:
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br label %endif
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endif:
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ret void
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}
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declare void @llvm.AMDGPU.kilp()
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