James Clarke cab1120454 [RISCV] Fix evaluating %pcrel_lo against global and weak symbols ... Summary: Previously, we would erroneously turn %pcrel_lo(label), where label has a %pcrel_hi against a weak symbol, into %pcrel_lo(label + offset), as evaluatePCRelLo would believe the target independent logic was going to fold it. Moreover, even if that were fixed, shouldForceRelocation lacks an MCAsmLayout and thus cannot evaluate the %pcrel_hi fixup to a value and check the symbol, so we would then erroneously constant-fold the %pcrel_lo whilst leaving the %pcrel_hi intact. After D72197, this same sequence also occurs for symbols with global binding, which is triggered in real-world code. Instead, as discussed in D71978, we introduce a new FKF_IsTarget flag to avoid these kinds of issues. All the resolution logic happens in one place, with no coordination required between RISCAsmBackend and RISCVMCExpr to ensure they implement the same logic twice. Although the implementation of %pcrel_hi can be left as target independent, we make it target dependent to ensure that they are handled identically to %pcrel_lo, otherwise we risk one of them being constant folded but the other being preserved. This also allows us to properly support fixup pairs where the instructions are in different fragments. Reviewers: asb, lenary, efriedma Reviewed By: efriedma Subscribers: arichardson, hiraditya, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D73211		2020-01-23 02:05:48 +00:00
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AsmParser	[RISCV] Support ABI checking with per function target-features	2020-01-22 08:12:28 -08:00
Disassembler	CMake: Make most target symbols hidden by default	2020-01-14 19:46:52 -08:00
MCTargetDesc	[RISCV] Fix evaluating %pcrel_lo against global and weak symbols	2020-01-23 02:05:48 +00:00
TargetInfo	CMake: Make most target symbols hidden by default	2020-01-14 19:46:52 -08:00
Utils	[RISCV] Support ABI checking with per function target-features	2020-01-22 08:12:28 -08:00
CMakeLists.txt
LLVMBuild.txt
RISCV.h
RISCV.td	[RISCV] Improve assembler missing feature warnings	2019-12-10 16:44:48 +00:00
RISCVAsmPrinter.cpp	CMake: Make most target symbols hidden by default	2020-01-14 19:46:52 -08:00
RISCVCallingConv.td
RISCVCallLowering.cpp
RISCVCallLowering.h
RISCVExpandPseudoInsts.cpp	[RISCV] Use addi rather than add x0	2019-11-14 18:43:38 +00:00
RISCVFrameLowering.cpp	[RISCV] Allow shrink wrapping for RISC-V	2020-01-14 18:59:11 +00:00
RISCVFrameLowering.h	[RISCV] Handle variable sized objects with the stack need to be realigned	2019-11-16 12:39:53 +08:00
RISCVInstrFormats.td
RISCVInstrFormatsC.td
RISCVInstrInfo.cpp	Update spelling of {analyze,insert,remove}Branch in strings and comments	2020-01-21 10:15:38 -06:00
RISCVInstrInfo.h	[RISCV] Enable the machine outliner for RISC-V	2019-12-19 16:41:53 +00:00
RISCVInstrInfo.td	Fix typo "psuedo" in comments	2020-01-03 14:05:58 +00:00
RISCVInstrInfoA.td	[RISCV] Check register class for AMO memory operands	2020-01-13 00:50:37 +00:00
RISCVInstrInfoC.td
RISCVInstrInfoD.td	[RISCV] Handle fcopysign(f32, f64) and fcopysign(f64, f32)	2019-11-26 14:26:31 +00:00
RISCVInstrInfoF.td
RISCVInstrInfoM.td
RISCVInstructionSelector.cpp
RISCVISelDAGToDAG.cpp	[SelectionDAG] Disallow indirect "i" constraint	2019-12-29 16:50:42 -08:00
RISCVISelLowering.cpp	[RISCV] Support ABI checking with per function target-features	2020-01-22 08:12:28 -08:00
RISCVISelLowering.h	CodeGen: Use LLT instead of EVT in getRegisterByName	2020-01-09 17:37:52 -05:00
RISCVLegalizerInfo.cpp
RISCVLegalizerInfo.h
RISCVMachineFunctionInfo.h
RISCVMCInstLower.cpp
RISCVMergeBaseOffset.cpp
RISCVRegisterBankInfo.cpp
RISCVRegisterBankInfo.h
RISCVRegisterBanks.td
RISCVRegisterInfo.cpp	[RISCV] Handle variable sized objects with the stack need to be realigned	2019-11-16 12:39:53 +08:00
RISCVRegisterInfo.h	[TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true	2020-01-19 14:20:37 -08:00
RISCVRegisterInfo.td
RISCVSubtarget.cpp	[RISCV] Add support for -ffixed-xX flags	2019-10-22 21:25:01 +01:00
RISCVSubtarget.h	[RISCV] Add support for -ffixed-xX flags	2019-10-22 21:25:01 +01:00
RISCVSystemOperands.td
RISCVTargetMachine.cpp	[RISCV] Check the target-abi module flag matches the option	2020-01-21 07:32:12 -08:00
RISCVTargetMachine.h	[RISCV] Add subtargets initialized with target feature	2019-12-17 09:34:01 -08:00
RISCVTargetObjectFile.cpp	Revert "Honor -fuse-init-array when os is not specified on x86"	2019-12-17 07:36:59 -08:00
RISCVTargetObjectFile.h
RISCVTargetTransformInfo.cpp	Rename TTI::getIntImmCost for instructions and intrinsics	2019-12-11 18:00:20 -08:00
RISCVTargetTransformInfo.h	Rename TTI::getIntImmCost for instructions and intrinsics	2019-12-11 18:00:20 -08:00