Kristina Brooks 2366d430dd [llvm][test] Update tests using objdump ...

Update tests using llvm-objdump since check strings don't
match anymore due to the extra `O` in place. This is a 
followup for rL346610. 
 

llvm-svn: 346611

2018-11-11 18:40:33 +00:00

..

AArch64

[AArch64] Support HiSilicon's TSV110 processor

2018-11-09 19:32:08 +00:00

AMDGPU

[AMDGPU] support image load/store a16

2018-10-31 10:34:48 +00:00

ARM

[ARM] Emmit data symbol for constant pool data

2018-10-02 14:55:48 +00:00

AsmParser

[debuginfo] generate debug info with asm+.file

2018-08-28 16:23:39 +00:00

AVR

[AVR] Redefine the 'SBR' instruction as an alias

2018-09-01 12:22:54 +00:00

BPF

bpf: New disassembler testcases for 32-bit subregister support

2018-02-23 23:49:35 +00:00

COFF

[COFF] [X86] Don't use llvm_unreachable for unsupported relocation types

2018-10-04 20:43:38 +00:00

Disassembler

[AArch64] Support HiSilicon's TSV110 processor

2018-11-09 19:32:08 +00:00

ELF

[llvm][test] Update tests using objdump

2018-11-11 18:40:33 +00:00

Hexagon

[Hexagon] Handle Hexagon's SHF_HEX_GPREL section flag

2018-11-09 14:17:27 +00:00

Lanai

[lanai] Add more tests for assembly of conditional ALU ops

2016-07-11 17:58:16 +00:00

MachO

[MC/Dwarf] Unclamp DWARF linetables format on Darwin.

2018-09-13 13:13:50 +00:00

Mips

[mips] Support sigrie instruction

2018-11-06 14:37:24 +00:00

PowerPC

[MC] Avoid inlining constant symbols with variants.

2018-09-17 20:34:26 +00:00

RISCV

[RISCV] Fix disassembling of fence instruction with invalid field

2018-10-11 22:49:13 +00:00

Sparc

[Sparc] Add unimp alias

2018-09-27 12:34:53 +00:00

SystemZ

[SystemZ] Implement SystemZOperand::print()

2018-10-26 00:36:00 +00:00

WebAssembly

[WebAssembly] Renumber and LEB128-encode SIMD opcodes

2018-11-09 01:45:56 +00:00

X86

[MC] Separate masm integer literal lexer support from inline asm

2018-10-24 20:23:57 +00:00