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31 lines
1.0 KiB
LLVM
31 lines
1.0 KiB
LLVM
; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
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; arm64 does not use these pseudo-vectors, and they're not blessed by the PCS. Skipping.
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; Test load/store of v1i8, v1i16, v1i32 types can be selected correctly
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define void @load.store.v1i8(<1 x i8>* %ptr, <1 x i8>* %ptr2) {
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; CHECK-LABEL: load.store.v1i8:
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; CHECK: ldr b{{[0-9]+}}, [x{{[0-9]+|sp}}]
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; CHECK: str b{{[0-9]+}}, [x{{[0-9]+|sp}}]
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%a = load <1 x i8>* %ptr
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store <1 x i8> %a, <1 x i8>* %ptr2
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ret void
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}
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define void @load.store.v1i16(<1 x i16>* %ptr, <1 x i16>* %ptr2) {
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; CHECK-LABEL: load.store.v1i16:
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; CHECK: ldr h{{[0-9]+}}, [x{{[0-9]+|sp}}]
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; CHECK: str h{{[0-9]+}}, [x{{[0-9]+|sp}}]
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%a = load <1 x i16>* %ptr
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store <1 x i16> %a, <1 x i16>* %ptr2
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ret void
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}
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define void @load.store.v1i32(<1 x i32>* %ptr, <1 x i32>* %ptr2) {
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; CHECK-LABEL: load.store.v1i32:
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; CHECK: ldr s{{[0-9]+}}, [x{{[0-9]+|sp}}]
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; CHECK: str s{{[0-9]+}}, [x{{[0-9]+|sp}}]
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%a = load <1 x i32>* %ptr
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store <1 x i32> %a, <1 x i32>* %ptr2
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ret void
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}
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