1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-31 20:51:52 +01:00
Ayke van Laethem 8f4cb72386 [AVR] Fix private label prefix
This is a small pet peeve from me. This change makes sure the AVR backend uses
the correct private label prefix (.L) so that private labels are hidden in
avr-objdump.

Example code:

    define i8 @foo(i1 %cond) {
      br i1 %cond, label %then, label %else
    then:
      ret i8 3
    else:
      ret i8 5
    }

When compiling this:
  llc -march=avr -filetype=obj -o test.o test.ll
and then dumping it:
  avr-objdump -d test.o
You would previously get an ugly temporary label:

    00000000 <foo>:
       0:        81 70       andi       r24, 0x01    ; 1
       2:        80 30       cpi        r24, 0x00    ; 0
       4:        f9 f3       breq       .-2          ; 0x4 <foo+0x4>
       6:        83 e0       ldi        r24, 0x03    ; 3
       8:        08 95       ret

    0000000a <LBB0_2>:
       a:        85 e0       ldi        r24, 0x05    ; 5
       c:        08 95       ret

This patch fixes that, the output is now:

    00000000 <foo>:
       0:        81 70       andi       r24, 0x01    ; 1
       2:        80 30       cpi        r24, 0x00    ; 0
       4:        01 f0       breq       .+0          ; 0x6 <foo+0x6>
       6:        83 e0       ldi        r24, 0x03    ; 3
       8:        08 95       ret
       a:        85 e0       ldi        r24, 0x05    ; 5
       c:        08 95       ret

Note that as you can see the breq operand is different. However it is
still the same after linking:

       4:        11 f0       breq       .+4

Differential Revision: https://reviews.llvm.org/D75124
2020-02-26 20:32:25 +01:00

60 lines
1.0 KiB
LLVM

; RUN: llc < %s -march=avr | FileCheck %s
; Bit rotation tests.
; CHECK-LABEL: rol8:
define i8 @rol8(i8 %val, i8 %amt) {
; CHECK: andi r22, 7
; CHECK-NEXT: cpi r22, 0
; CHECK-NEXT: breq .LBB0_2
; CHECK-NEXT: .LBB0_1:
; CHECK-NEXT: lsl r24
; CHECK-NEXT: adc r24, r1
; CHECK-NEXT: subi r22, 1
; CHECK-NEXT: brne .LBB0_1
; CHECK-NEXT: .LBB0_2:
; CHECK-NEXT: ret
%mod = urem i8 %amt, 8
%inv = sub i8 8, %mod
%parta = shl i8 %val, %mod
%partb = lshr i8 %val, %inv
%rotl = or i8 %parta, %partb
ret i8 %rotl
}
; CHECK-LABEL: ror8:
define i8 @ror8(i8 %val, i8 %amt) {
; CHECK: andi r22, 7
; CHECK-NEXT: cpi r22, 0
; CHECK-NEXT: breq .LBB1_2
; CHECK-NEXT: .LBB1_1:
; CHECK-NEXT: lsr r24
; CHECK-NEXT: ldi r0, 0
; CHECK-NEXT: ror r0
; CHECK-NEXT: or r24, r0
; CHECK-NEXT: subi r22, 1
; CHECK-NEXT: brne .LBB1_1
; CHECK-NEXT: .LBB1_2:
; CHECK-NEXT: ret
%mod = urem i8 %amt, 8
%inv = sub i8 8, %mod
%parta = lshr i8 %val, %mod
%partb = shl i8 %val, %inv
%rotr = or i8 %parta, %partb
ret i8 %rotr
}