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d4c615be8c
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
67 lines
1.7 KiB
YAML
67 lines
1.7 KiB
YAML
# RUN: llc -o - %s -mtriple=thumb-arm-none-eabi -mcpu=cortex-m0 -run-pass scavenger-test | FileCheck %s
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---
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# CHECK-LABEL: name: scavengebug0
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# Make sure we are not spilling/using a physreg used in the very last
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# instruction of the scavenging range.
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# CHECK-NOT: tSTRi {{.*}}$r0,{{.*}}$r0
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# CHECK-NOT: tSTRi {{.*}}$r1,{{.*}}$r1
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# CHECK-NOT: tSTRi {{.*}}$r2,{{.*}}$r2
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# CHECK-NOT: tSTRi {{.*}}$r3,{{.*}}$r3
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# CHECK-NOT: tSTRi {{.*}}$r4,{{.*}}$r4
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# CHECK-NOT: tSTRi {{.*}}$r5,{{.*}}$r5
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# CHECK-NOT: tSTRi {{.*}}$r6,{{.*}}$r6
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# CHECK-NOT: tSTRi {{.*}}$r7,{{.*}}$r7
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name: scavengebug0
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body: |
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bb.0:
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; Bring up register pressure to force emergency spilling
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$r0 = IMPLICIT_DEF
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$r1 = IMPLICIT_DEF
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$r2 = IMPLICIT_DEF
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$r3 = IMPLICIT_DEF
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$r4 = IMPLICIT_DEF
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$r5 = IMPLICIT_DEF
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$r6 = IMPLICIT_DEF
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$r7 = IMPLICIT_DEF
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%0 : tgpr = IMPLICIT_DEF
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%0 = tADDhirr %0, $sp, 14, $noreg
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tSTRi $r0, %0, 0, 14, $noreg
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%1 : tgpr = IMPLICIT_DEF
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%1 = tADDhirr %1, $sp, 14, $noreg
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tSTRi $r1, %1, 0, 14, $noreg
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%2 : tgpr = IMPLICIT_DEF
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%2 = tADDhirr %2, $sp, 14, $noreg
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tSTRi $r2, %2, 0, 14, $noreg
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%3 : tgpr = IMPLICIT_DEF
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%3 = tADDhirr %3, $sp, 14, $noreg
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tSTRi $r3, %3, 0, 14, $noreg
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%4 : tgpr = IMPLICIT_DEF
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%4 = tADDhirr %4, $sp, 14, $noreg
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tSTRi $r4, %4, 0, 14, $noreg
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%5 : tgpr = IMPLICIT_DEF
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%5 = tADDhirr %5, $sp, 14, $noreg
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tSTRi $r5, %5, 0, 14, $noreg
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%6 : tgpr = IMPLICIT_DEF
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%6 = tADDhirr %6, $sp, 14, $noreg
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tSTRi $r6, %6, 0, 14, $noreg
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%7 : tgpr = IMPLICIT_DEF
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%7 = tADDhirr %7, $sp, 14, $noreg
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tSTRi $r7, %7, 0, 14, $noreg
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KILL $r0
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KILL $r1
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KILL $r2
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KILL $r3
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KILL $r4
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KILL $r5
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KILL $r6
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KILL $r7
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