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llvm-mirror/test/CodeGen
Changpeng Fang 2689f02d01 AMDGPU/SI: Define an intrinsic to expose ds_swizzle_b32
Reviewers: tstellarAMD, arsenm

Differential Revision: http://reviews.llvm.org/D21533

llvm-svn: 273496
2016-06-22 21:33:49 +00:00
..
AArch64 [AArch64] Remove an overly aggressive assert. 2016-06-22 19:18:52 +00:00
AMDGPU AMDGPU/SI: Define an intrinsic to expose ds_swizzle_b32 2016-06-22 21:33:49 +00:00
ARM [arm+x86] Make GNU variants behave like GNU w.r.t combining sin+cos into sincos. 2016-06-21 12:29:03 +00:00
BPF
Generic
Hexagon [Hexagon] Add SDAG preprocessing step to expose shifted addressing modes 2016-06-22 20:08:27 +00:00
Inputs
Lanai
Mips [mips] Emit a JALR with $rd equal to $zero, instead of a JR in MIPS32R6. 2016-06-18 15:39:43 +00:00
MIR [mips][mips16] Fix machine verifier errors about incorrect register classes on load/stores. 2016-06-16 10:20:59 +00:00
MSP430
NVPTX [NVPTX] Improve lowering of byval args of device functions. 2016-06-21 20:30:26 +00:00
PowerPC
SPARC [SPARC[ Correcting out-of-date unit tests checked in as part of r273108 2016-06-19 12:52:39 +00:00
SystemZ [SystemZ] Recognize RISBG opportunities involving a truncate 2016-06-22 16:16:27 +00:00
Thumb
Thumb2 Don't print (PLT) on arm. 2016-06-16 16:09:53 +00:00
WebAssembly
WinEH
X86 Upgrade old memset/memcpy signatures (without isVolatile argument) in tests 2016-06-22 15:16:06 +00:00
XCore IR: Introduce Module::global_objects(). 2016-06-22 20:29:42 +00:00