1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00
llvm-mirror/test/CodeGen/X86/pr41748.ll
Craig Topper c804c11acc [SelectionDAG][X86] Support inline assembly returning an mmx register into a type with fewer than 64 bits.
It's possible to use the 'y' mmx constraint with a type narrower than 64-bits.

This patch supports this by bitcasting the mmx type to 64-bits and then
truncating to the desired type.

There are probably other missing type combinations we need to support, but this
is the case we have a bug report for.

Fixes PR41748.

Differential Revision: https://reviews.llvm.org/D61582

llvm-svn: 360069
2019-05-06 19:50:14 +00:00

16 lines
515 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-apple-macosx10.14.0 -mattr=mmx | FileCheck %s
define i32 @foo(i32 %a) {
; CHECK-LABEL: foo:
; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: ## InlineAsm Start
; CHECK-NEXT: movd %edi, %mm0
; CHECK-NEXT: ## InlineAsm End
; CHECK-NEXT: movd %mm0, %eax
; CHECK-NEXT: retq
entry:
%0 = tail call i32 asm sideeffect "movd $1, $0", "=y,r,~{dirflag},~{fpsr},~{flags}"(i32 %a)
ret i32 %0
}