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The RISC-V Privileged Specification 1.11 defines `mcountinhibit`, which has the same numeric CSR value as `mucounteren` from 1.09.1. This patch enables the use of the old `mucounteren` name. Patch by Yuichi Sugiyama. Reviewed By: lenary, jrtc27, pzheng Differential Revision: https://reviews.llvm.org/D85067 |
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AArch64 | ||
AMDGPU | ||
ARM | ||
AsmParser | ||
AVR | ||
BPF | ||
COFF | ||
Disassembler | ||
ELF | ||
Hexagon | ||
Lanai | ||
MachO | ||
Mips | ||
MSP430 | ||
PowerPC | ||
RISCV | ||
Sparc | ||
SystemZ | ||
VE | ||
WebAssembly | ||
X86 |