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d2c968e63d
The `sne Dst, Src1, Src2/Imm` pseudo instruction sets register `Dst` to 1 if register `Src1` is not equal to `Src2/Imm` and to 0 otherwise.
28 lines
1.3 KiB
ArmAsm
28 lines
1.3 KiB
ArmAsm
# RUN: llvm-mc -arch=mips -show-encoding -mcpu=mips1 < %s \
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# RUN: | FileCheck --check-prefixes=ALL,MIPS32 %s
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# RUN: llvm-mc -arch=mips -show-encoding -mcpu=mips64 < %s \
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# RUN: | FileCheck --check-prefixes=ALL,MIPS64 %s
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sne $4, $5, $6
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# ALL: xor $4, $5, $6 # encoding: [0x00,0xa6,0x20,0x26]
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# ALL: sltu $4, $zero, $4 # encoding: [0x00,0x04,0x20,0x2b]
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sne $4, $zero, $6
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# ALL: sltu $4, $zero, $6 # encoding: [0x00,0x06,0x20,0x2b]
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sne $4, $5, $zero
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# ALL: sltu $4, $zero, $5 # encoding: [0x00,0x05,0x20,0x2b]
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sne $4, $5, 0
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# ALL: sltu $4, $zero, $5 # encoding: [0x00,0x05,0x20,0x2b]
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sne $4, $zero, 1
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# ALL: addiu $4, $zero, 1 # encoding: [0x24,0x04,0x00,0x01]
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sne $4, $5, -1
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# MIPS32: addiu $4, $5, 1 # encoding: [0x24,0xa4,0x00,0x01]
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# MIPS64: daddiu $4, $5, 1 # encoding: [0x64,0xa4,0x00,0x01]
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# ALL: sltu $4, $zero, $4 # encoding: [0x00,0x04,0x20,0x2b]
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sne $4, $5, 1
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# ALL: xori $4, $5, 1 # encoding: [0x38,0xa4,0x00,0x01]
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# ALL: sltu $4, $zero, $4 # encoding: [0x00,0x04,0x20,0x2b]
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sne $4, $5, 0x10000
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# ALL: lui $1, 1 # encoding: [0x3c,0x01,0x00,0x01]
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# ALL: xor $4, $5, $1 # encoding: [0x00,0xa1,0x20,0x26]
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# ALL: sltu $4, $zero, $4 # encoding: [0x00,0x04,0x20,0x2b]
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