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283f599fca
Code like the following:
define i32 @foo(i32 %a, i1 zeroext %b) addrspace(1) {
entry:
%conv = zext i1 %b to i32
%add = add nsw i32 %conv, %a
ret i32 %add
}
Would compile to the following (incorrect) code:
foo:
mov r18, r20
clr r19
add r22, r18
adc r23, r19
sbci r24, 0
sbci r25, 0
ret
Those sbci instructions are clearly wrong, they should have been adc
instructions.
This commit improves codegen to use adc instead:
foo:
mov r18, r20
clr r19
ldi r20, 0
ldi r21, 0
add r22, r18
adc r23, r19
adc r24, r20
adc r25, r21
ret
This code is not optimal (it could be just 5 instructions instead of the
current 9) but at least it doesn't miscompile.
Differential Revision: https://reviews.llvm.org/D78439
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|---|---|---|
| .. | ||
| AsmParser | ||
| Disassembler | ||
| MCTargetDesc | ||
| TargetInfo | ||
| AVR.h | ||
| AVR.td | ||
| AVRAsmPrinter.cpp | ||
| AVRCallingConv.td | ||
| AVRDevices.td | ||
| AVRExpandPseudoInsts.cpp | ||
| AVRFrameLowering.cpp | ||
| AVRFrameLowering.h | ||
| AVRInstrFormats.td | ||
| AVRInstrInfo.cpp | ||
| AVRInstrInfo.h | ||
| AVRInstrInfo.td | ||
| AVRISelDAGToDAG.cpp | ||
| AVRISelLowering.cpp | ||
| AVRISelLowering.h | ||
| AVRMachineFunctionInfo.h | ||
| AVRMCInstLower.cpp | ||
| AVRMCInstLower.h | ||
| AVRRegisterInfo.cpp | ||
| AVRRegisterInfo.h | ||
| AVRRegisterInfo.td | ||
| AVRRelaxMemOperations.cpp | ||
| AVRSelectionDAGInfo.h | ||
| AVRSubtarget.cpp | ||
| AVRSubtarget.h | ||
| AVRTargetMachine.cpp | ||
| AVRTargetMachine.h | ||
| AVRTargetObjectFile.cpp | ||
| AVRTargetObjectFile.h | ||
| CMakeLists.txt | ||
| LLVMBuild.txt | ||
| README.md | ||
| TODO.md | ||