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3262b6a145
xorl + setcc is generally the preferred sequence due to the partial register stall setcc + movzbl suffers from. As a bonus, it also encodes one byte smaller. This fixes PR28146. The original commit tried inserting an 8bit-subreg into a GR32 (not GR32_ABCD) which was not appreciated by fast regalloc on 32-bit. llvm-svn: 274802
10 lines
312 B
LLVM
10 lines
312 B
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep xorl
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define i32 @foo(<4 x float> %a, <4 x float> %b) nounwind {
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entry:
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tail call i32 @llvm.x86.sse.ucomige.ss( <4 x float> %a, <4 x float> %b ) nounwind readnone
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ret i32 %0
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}
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declare i32 @llvm.x86.sse.ucomige.ss(<4 x float>, <4 x float>) nounwind readnone
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