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f05854a8a9
Generalize sdiv/udiv/srem/urem combines using APInt::isPowerOf2, which only works for const/splat-const values, to call SelectionDAG::isKnownToBeAPowerOfTwo instead which recognises many more cases. Added a DAGCombiner::BuildLogBase2 helper since PowerOf2 combines often involve taking the log2 of such a value. Differential Revision: https://reviews.llvm.org/D27714 llvm-svn: 289654
68 lines
2.1 KiB
LLVM
68 lines
2.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
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; fold (srem undef, x) -> 0
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define <4 x i32> @combine_vec_srem_undef0(<4 x i32> %x) {
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; SSE-LABEL: combine_vec_srem_undef0:
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; SSE: # BB#0:
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; SSE-NEXT: retq
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;
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; AVX-LABEL: combine_vec_srem_undef0:
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; AVX: # BB#0:
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; AVX-NEXT: retq
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%1 = srem <4 x i32> undef, %x
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ret <4 x i32> %1
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}
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; fold (srem x, undef) -> undef
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define <4 x i32> @combine_vec_srem_undef1(<4 x i32> %x) {
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; SSE-LABEL: combine_vec_srem_undef1:
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; SSE: # BB#0:
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; SSE-NEXT: retq
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;
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; AVX-LABEL: combine_vec_srem_undef1:
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; AVX: # BB#0:
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; AVX-NEXT: retq
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%1 = srem <4 x i32> %x, undef
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ret <4 x i32> %1
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}
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; fold (srem x, y) -> (urem x, y) iff x and y are positive
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define <4 x i32> @combine_vec_srem_by_pos0(<4 x i32> %x) {
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; SSE-LABEL: combine_vec_srem_by_pos0:
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; SSE: # BB#0:
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; SSE-NEXT: andps {{.*}}(%rip), %xmm0
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; SSE-NEXT: retq
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;
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; AVX1-LABEL: combine_vec_srem_by_pos0:
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; AVX1: # BB#0:
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; AVX1-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: combine_vec_srem_by_pos0:
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; AVX2: # BB#0:
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; AVX2-NEXT: vbroadcastss {{.*}}(%rip), %xmm1
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; AVX2-NEXT: vandps %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: retq
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%1 = and <4 x i32> %x, <i32 255, i32 255, i32 255, i32 255>
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%2 = srem <4 x i32> %1, <i32 4, i32 4, i32 4, i32 4>
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ret <4 x i32> %2
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}
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define <4 x i32> @combine_vec_srem_by_pos1(<4 x i32> %x) {
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; SSE-LABEL: combine_vec_srem_by_pos1:
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; SSE: # BB#0:
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; SSE-NEXT: andps {{.*}}(%rip), %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: combine_vec_srem_by_pos1:
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; AVX: # BB#0:
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; AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0
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; AVX-NEXT: retq
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%1 = and <4 x i32> %x, <i32 255, i32 255, i32 255, i32 255>
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%2 = srem <4 x i32> %1, <i32 1, i32 4, i32 8, i32 16>
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ret <4 x i32> %2
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}
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