..
cnop.s
compress-cjal.s
compress-rv32d.s
compress-rv32f.s
compress-rv32i.s
[RISCV] Add UNIMP instruction (32- and 16-bit forms)
2018-11-30 13:39:17 +00:00
compress-rv64i.s
compressed-relocations.s
csr-aliases.s
[RISCV] Support named operands for CSR instructions.
2018-10-04 21:50:54 +00:00
data-directives-invalid.s
data-directives-valid.s
elf-flags.s
elf-header.s
fixups-compressed.s
fixups-diagnostics.s
fixups-expr.s
fixups.s
[RISCV] Properly evaluate fixup_riscv_pcrel_lo12
2018-12-20 14:52:15 +00:00
function-call-invalid.s
function-call.s
[RISCV] Support named operands for CSR instructions.
2018-10-04 21:50:54 +00:00
hilo-constaddr-expr.s
hilo-constaddr.s
linker-relaxation.s
lit.local.cfg
lla-invalid.s
machine-csr-names-invalid.s
[RISCV] Support named operands for CSR instructions.
2018-10-04 21:50:54 +00:00
machine-csr-names.s
[RISCV] Support named operands for CSR instructions.
2018-10-04 21:50:54 +00:00
option-invalid.s
[RISCV] Support .option push and .option pop
2018-11-28 16:39:14 +00:00
option-pushpop.s
[RISCV] Support .option push and .option pop
2018-11-28 16:39:14 +00:00
option-relax.s
[RISCV] Support .option relax and .option norelax
2018-11-12 14:25:07 +00:00
option-rvc.s
pcrel-lo12-invalid.s
[RISCV] Properly evaluate fixup_riscv_pcrel_lo12
2018-12-20 14:52:15 +00:00
priv-invalid.s
priv-valid.s
relocations.s
[RISCV] Properly evaluate fixup_riscv_pcrel_lo12
2018-12-20 14:52:15 +00:00
rv32-machine-csr-names.s
[RISCV] Support named operands for CSR instructions.
2018-10-04 21:50:54 +00:00
rv32-relaxation.s
rv32-user-csr-names.s
[RISCV] Support named operands for CSR instructions.
2018-10-04 21:50:54 +00:00
rv32a-invalid.s
rv32a-valid.s
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands
2018-09-06 13:41:04 +00:00
rv32c-aliases-valid.s
rv32c-fuzzed-invalid.s
rv32c-invalid.s
[RISCV][MC] Reject bare symbols for the simm6 and simm6nonzero operand types
2018-09-13 18:37:23 +00:00
rv32c-only-valid.s
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands
2018-09-06 13:41:04 +00:00
rv32c-valid.s
[RISCV] Add UNIMP instruction (32- and 16-bit forms)
2018-11-30 13:39:17 +00:00
rv32d-invalid.s
[RISCV][MC] Reject bare symbols for the simm12 operand type
2018-09-18 15:13:29 +00:00
rv32d-valid.s
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands
2018-09-06 13:41:04 +00:00
rv32dc-invalid.s
rv32dc-valid.s
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands
2018-09-06 13:41:04 +00:00
rv32f-invalid.s
[RISCV][MC] Reject bare symbols for the simm12 operand type
2018-09-18 15:13:29 +00:00
rv32f-valid.s
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands
2018-09-06 13:41:04 +00:00
rv32fc-invalid.s
rv32fc-valid.s
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands
2018-09-06 13:41:04 +00:00
rv32i-aliases-invalid.s
rv32i-aliases-valid.s
[RISCV][MC] Add support for evaluating constant symbols as immediates
2019-01-10 15:33:17 +00:00
rv32i-invalid.s
[RISCV] Fix disassembling of fence instruction with invalid field
2018-10-11 22:49:13 +00:00
rv32i-valid.s
[RISCV][MC] Add support for evaluating constant symbols as immediates
2019-01-10 15:33:17 +00:00
rv32m-invalid.s
rv32m-valid.s
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands
2018-09-06 13:41:04 +00:00
rv64-machine-csr-names.s
[RISCV] Support named operands for CSR instructions.
2018-10-04 21:50:54 +00:00
rv64-relaxation.s
rv64-user-csr-names.s
[RISCV] Support named operands for CSR instructions.
2018-10-04 21:50:54 +00:00
rv64a-invalid.s
rv64a-valid.s
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands
2018-09-06 13:41:04 +00:00
rv64c-aliases-valid.s
[RISCV] Introduce the RISCVMatInt::generateInstSeq helper
2018-11-15 10:11:31 +00:00
rv64c-invalid.s
[RISCV][MC] Reject bare symbols for the simm6 and simm6nonzero operand types
2018-09-13 18:37:23 +00:00
rv64c-valid.s
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands
2018-09-06 13:41:04 +00:00
rv64d-aliases-valid.s
rv64d-invalid.s
rv64d-valid.s
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands
2018-09-06 13:41:04 +00:00
rv64dc-valid.s
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands
2018-09-06 13:41:04 +00:00
rv64f-aliases-valid.s
rv64f-invalid.s
rv64f-valid.s
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands
2018-09-06 13:41:04 +00:00
rv64i-aliases-invalid.s
rv64i-aliases-valid.s
[RISCV][MC] Add support for evaluating constant symbols as immediates
2019-01-10 15:33:17 +00:00
rv64i-invalid.s
[RISCV][MC] Reject bare symbols for the simm12 operand type
2018-09-18 15:13:29 +00:00
rv64i-valid.s
[RISCV][MC] Add support for evaluating constant symbols as immediates
2019-01-10 15:33:17 +00:00
rv64m-valid.s
[RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands
2018-09-06 13:41:04 +00:00
rvd-aliases-valid.s
rvf-aliases-valid.s
[RISCV] Support named operands for CSR instructions.
2018-10-04 21:50:54 +00:00
rvf-user-csr-names.s
[RISCV] Support named operands for CSR instructions.
2018-10-04 21:50:54 +00:00
rvi-aliases-valid.s
[RISCV] Add additional CSR instruction aliases (imm. operands)
2018-11-30 14:10:52 +00:00
rvi-pseudos.s
supervisor-csr-names.s
[RISCV] Support named operands for CSR instructions.
2018-10-04 21:50:54 +00:00
tail-call-invalid.s
tail-call.s
user-csr-names-invalid.s
[RISCV] Support named operands for CSR instructions.
2018-10-04 21:50:54 +00:00
user-csr-names.s
[RISCV] Support named operands for CSR instructions.
2018-10-04 21:50:54 +00:00