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llvm-mirror/test/MC/RISCV/rv64m-valid.s
Alex Bradbury 2b2d105ff9 [RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testing of symbol operands
Standardise on check lines:
* CHECK-ASM
* CHECK-OBJ
* CHECK-ASM-AND-OBJ

This allows for the addition of tests involving symbol operands, which will
not result in identical instructions in both assembly and disassembled object 
output.

This commit doesn't exploit this reworking to increase test coverage of symbol
operands - that will come in a future patch.

llvm-svn: 341546
2018-09-06 13:41:04 +00:00

22 lines
840 B
ArmAsm

# RUN: llvm-mc %s -triple=riscv64 -mattr=+m -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+m < %s \
# RUN: | llvm-objdump -mattr=+m -riscv-no-aliases -d -r - \
# RUN: | FileCheck -check-prefixes=CHECK-OBJ,CHECK-ASM-AND-OBJ %s
# CHECK-ASM-AND-OBJ: mulw ra, sp, gp
# CHECK-ASM: encoding: [0xbb,0x00,0x31,0x02]
mulw ra, sp, gp
# CHECK-ASM-AND-OBJ: divw tp, t0, t1
# CHECK-ASM: encoding: [0x3b,0xc2,0x62,0x02]
divw tp, t0, t1
# CHECK-ASM-AND-OBJ: divuw t2, s0, s2
# CHECK-ASM: encoding: [0xbb,0x53,0x24,0x03]
divuw t2, s0, s2
# CHECK-ASM-AND-OBJ: remw a0, a1, a2
# CHECK-ASM: encoding: [0x3b,0xe5,0xc5,0x02]
remw a0, a1, a2
# CHECK-ASM-AND-OBJ: remuw a3, a4, a5
# CHECK-ASM: encoding: [0xbb,0x76,0xf7,0x02]
remuw a3, a4, a5