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2b1df58ebe
llvm-mirror/lib/Target/AArch64
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Adrian Prantl 2b1df58ebe Move the complex address expression out of DIVariable and into an extra 
argument of the llvm.dbg.declare/llvm.dbg.value intrinsics.

Previously, DIVariable was a variable-length field that has an optional
reference to a Metadata array consisting of a variable number of
complex address expressions. In the case of OpPiece expressions this is
wasting a lot of storage in IR, because when an aggregate type is, e.g.,
SROA'd into all of its n individual members, the IR will contain n copies
of the DIVariable, all alike, only differing in the complex address
reference at the end.

By making the complex address into an extra argument of the
dbg.value/dbg.declare intrinsics, all of the pieces can reference the
same variable and the complex address expressions can be uniqued across
the CU, too.
Down the road, this will allow us to move other flags, such as
"indirection" out of the DIVariable, too.

The new intrinsics look like this:
declare void @llvm.dbg.declare(metadata %storage, metadata %var, metadata %expr)
declare void @llvm.dbg.value(metadata %storage, i64 %offset, metadata %var, metadata %expr)

This patch adds a new LLVM-local tag to DIExpressions, so we can detect
and pretty-print DIExpression metadata nodes.

What this patch doesn't do:

This patch does not touch the "Indirect" field in DIVariable; but moving
that into the expression would be a natural next step.

http://reviews.llvm.org/D4919
rdar://problem/17994491

Thanks to dblaikie and dexonsmith for reviewing this patch!

Note: I accidentally committed a bogus older version of this patch previously.
llvm-svn: 218787
2014-10-01 18:55:02 +00:00
..
AsmParser AArch64: allow constant expressions for shifted reg literals 2014-09-23 22:16:02 +00:00
Disassembler [AArch64] Allow access to all system registers with MRS/MSR instructions. 2014-10-01 10:13:59 +00:00
InstPrinter [AArch64] Allow access to all system registers with MRS/MSR instructions. 2014-10-01 10:13:59 +00:00
MCTargetDesc Fix segfault in AArch64 backend with -g and -mbig-endian 2014-09-23 15:38:11 +00:00
TargetInfo AArch64: stop trying to take control of all UnknownArch triples. 2014-08-08 08:27:44 +00:00
Utils [AArch64] Allow access to all system registers with MRS/MSR instructions. 2014-10-01 10:13:59 +00:00
AArch64.h [AArch64] Add experimental PBQP support 2014-09-10 14:06:10 +00:00
AArch64.td [AArch64] Basic Sched Model for Cortex-A57. 2014-06-11 21:06:56 +00:00
AArch64A57FPLoadBalancing.cpp [A57FPLoadBalancing] Modify r217689 - actually we do need to check defs 2014-09-14 18:24:26 +00:00
AArch64AddressTypePromotion.cpp Fix typos in comments 2014-08-15 22:17:28 +00:00
AArch64AdvSIMDScalarPass.cpp Remove the TargetMachine forwards for TargetSubtargetInfo based 2014-08-04 21:25:23 +00:00
AArch64AsmPrinter.cpp Delete unused argument in AArch64MCInstLower constructor: it doesn't 2014-08-19 21:51:08 +00:00
AArch64BranchRelaxation.cpp Testing commit access. 2014-08-14 16:20:50 +00:00
AArch64CallingConvention.td Teach the AArch64 backend about v4f16 and v8f16 2014-08-27 16:16:04 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp Remove the TargetMachine forwards for TargetSubtargetInfo based 2014-08-04 21:25:23 +00:00
AArch64CollectLOH.cpp AArch64: use std::fill instead of memset 2014-08-26 03:33:26 +00:00
AArch64ConditionalCompares.cpp Change MCSchedModel to be a struct of statically initialized data. 2014-09-02 17:43:54 +00:00
AArch64ConditionOptimizer.cpp [AArch64] Add pass to enable additional comparison optimizations by CSE. 2014-09-05 02:55:24 +00:00
AArch64DeadRegisterDefinitionsPass.cpp Remove 'virtual' keyword from methods markedwith 'override' keyword. 2014-08-30 16:48:34 +00:00
AArch64ExpandPseudoInsts.cpp Have MachineFunction cache a pointer to the subtarget to make lookups 2014-08-05 02:39:49 +00:00
AArch64FastISel.cpp Recommit r218010 [FastISel][AArch64] Fold bit test and branch into TBZ and TBNZ. 2014-09-30 19:59:35 +00:00
AArch64FrameLowering.cpp Fix typos: 2014-08-11 18:04:46 +00:00
AArch64FrameLowering.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64InstrAtomics.td Make use of isAtLeastRelease/Acquire in the ARM/AArch64 backends 2014-08-18 16:48:58 +00:00
AArch64InstrFormats.td [AArch64] Allow access to all system registers with MRS/MSR instructions. 2014-10-01 10:13:59 +00:00
AArch64InstrInfo.cpp Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
AArch64InstrInfo.h Move the complex address expression out of DIVariable and into an extra 2014-10-01 18:55:02 +00:00
AArch64InstrInfo.td Add missing natual vector cast. 2014-10-01 09:59:45 +00:00
AArch64ISelDAGToDAG.cpp Merge Extend and Shift into a UBFX 2014-09-02 09:33:56 +00:00
AArch64ISelLowering.cpp Add missing natual vector cast. 2014-10-01 09:59:45 +00:00
AArch64ISelLowering.h [X86] Use the generic AtomicExpandPass instead of X86AtomicExpandPass 2014-09-17 00:06:58 +00:00
AArch64LoadStoreOptimizer.cpp Add missing closing namespace comment. 2014-08-11 22:42:31 +00:00
AArch64MachineCombinerPattern.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64MachineFunctionInfo.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64MCInstLower.cpp Delete unused argument in AArch64MCInstLower constructor: it doesn't 2014-08-19 21:51:08 +00:00
AArch64MCInstLower.h Delete unused argument in AArch64MCInstLower constructor: it doesn't 2014-08-19 21:51:08 +00:00
AArch64PBQPRegAlloc.cpp Fix gcc -Wpedantic. 2014-09-12 12:32:08 +00:00
AArch64PerfectShuffle.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64PromoteConstant.cpp Run sort_includes.py on the AArch64 backend. 2014-07-25 11:42:14 +00:00
AArch64RegisterInfo.cpp Have MachineFunction cache a pointer to the subtarget to make lookups 2014-08-05 02:39:49 +00:00
AArch64RegisterInfo.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64RegisterInfo.td Teach the AArch64 backend about v4f16 and v8f16 2014-08-27 16:16:04 +00:00
AArch64SchedA53.td Fix typos 2014-05-31 21:26:28 +00:00
AArch64SchedA57.td [AArch64] Refines the Cortex-A57 Machine Model 2014-09-29 21:27:36 +00:00
AArch64SchedA57WriteRes.td [AArch64] Refines the Cortex-A57 Machine Model 2014-09-29 21:27:36 +00:00
AArch64SchedCyclone.td AArch64/ARM64: move ARM64 into AArch64's place 2014-05-24 12:50:23 +00:00
AArch64Schedule.td AArch64/ARM64: move ARM64 into AArch64's place 2014-05-24 12:50:23 +00:00
AArch64SelectionDAGInfo.cpp Remove the TargetMachine forwards for TargetSubtargetInfo based 2014-08-04 21:25:23 +00:00
AArch64SelectionDAGInfo.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64StorePairSuppress.cpp Change MCSchedModel to be a struct of statically initialized data. 2014-09-02 17:43:54 +00:00
AArch64Subtarget.cpp [AArch 64] Use a constant pool load for weak symbol references when 2014-09-10 13:54:38 +00:00
AArch64Subtarget.h [AArch64] Enable post-RA MI scheduler. 2014-09-12 17:40:39 +00:00
AArch64TargetMachine.cpp [AArch64] Don't enable the post-RA MI scheduler at OptNone. 2014-09-12 22:17:28 +00:00
AArch64TargetMachine.h Reverting NFC changes from r218050. Instead, the warning was disabled for GCC in r218059, so these changes are no longer required. 2014-09-18 17:34:23 +00:00
AArch64TargetObjectFile.cpp AArch64/ARM64: move ARM64 into AArch64's place 2014-05-24 12:50:23 +00:00
AArch64TargetObjectFile.h Canonicalize header guards into a common format. 2014-08-13 16:26:38 +00:00
AArch64TargetTransformInfo.cpp [AArch64] Improve cost model to handle sdiv by a pow-of-two. 2014-09-29 13:59:31 +00:00
CMakeLists.txt [AArch64] Add experimental PBQP support 2014-09-10 14:06:10 +00:00
LLVMBuild.txt Prune redundant libdeps. 2014-07-24 11:45:27 +00:00
Makefile AArch64/ARM64: move ARM64 into AArch64's place 2014-05-24 12:50:23 +00:00