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https://github.com/RPCS3/llvm-mirror.git
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a8dd5e49ed
This was already something that was handled by one of the "else" branches in maybeLoweredToCall, so this patch is an NFC but makes it explicit and adds a test. We may in the future want to support this under certain situations but for the moment just don't try and create low overhead loops with inline asm in them. Differential Revision: https://reviews.llvm.org/D91257
97 lines
3.6 KiB
LLVM
97 lines
3.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs -o - %s | FileCheck %s
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define i32 @test(i16* nocapture readonly %x, i16* nocapture readonly %y, i32 %n) {
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; CHECK-LABEL: test:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: .save {r7, lr}
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; CHECK-NEXT: push {r7, lr}
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; CHECK-NEXT: cmp r2, #1
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; CHECK-NEXT: blt .LBB0_4
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; CHECK-NEXT: @ %bb.1: @ %for.body.preheader
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; CHECK-NEXT: mov lr, r0
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; CHECK-NEXT: movs r0, #0
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; CHECK-NEXT: .LBB0_2: @ %for.body
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; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: ldrh r3, [r1], #2
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; CHECK-NEXT: subs r2, #1
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; CHECK-NEXT: ldrh r12, [lr], #2
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; CHECK-NEXT: @APP
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; CHECK-NEXT: add r3, r12
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; CHECK-NEXT: @NO_APP
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; CHECK-NEXT: add r0, r3
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; CHECK-NEXT: bne .LBB0_2
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; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup
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; CHECK-NEXT: pop {r7, pc}
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; CHECK-NEXT: .LBB0_4:
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; CHECK-NEXT: movs r0, #0
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; CHECK-NEXT: pop {r7, pc}
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entry:
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%cmp9 = icmp sgt i32 %n, 0
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br i1 %cmp9, label %for.body, label %for.cond.cleanup
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for.cond.cleanup: ; preds = %for.body, %entry
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%s.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ]
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ret i32 %s.0.lcssa
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for.body: ; preds = %entry, %for.body
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%s.011 = phi i32 [ %add, %for.body ], [ 0, %entry ]
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%i.010 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds i16, i16* %x, i32 %i.010
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%0 = load i16, i16* %arrayidx, align 2
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%arrayidx1 = getelementptr inbounds i16, i16* %y, i32 %i.010
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%1 = load i16, i16* %arrayidx1, align 2
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%2 = tail call i32 asm "add $0, $1, $2", "=r,r,r"(i16 %0, i16 %1) #1
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%add = add nsw i32 %2, %s.011
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%inc = add nuw nsw i32 %i.010, 1
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%exitcond.not = icmp eq i32 %inc, %n
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
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}
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define i32 @testlr(i16* nocapture readonly %x, i16* nocapture readonly %y, i32 %n) {
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; CHECK-LABEL: testlr:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: .save {r4, lr}
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; CHECK-NEXT: push {r4, lr}
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; CHECK-NEXT: cmp r2, #1
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; CHECK-NEXT: blt .LBB1_4
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; CHECK-NEXT: @ %bb.1: @ %for.body.preheader
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; CHECK-NEXT: mov r3, r0
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; CHECK-NEXT: movs r0, #0
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; CHECK-NEXT: .LBB1_2: @ %for.body
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; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: ldrh r4, [r1], #2
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; CHECK-NEXT: subs r2, #1
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; CHECK-NEXT: ldrh r12, [r3], #2
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; CHECK-NEXT: @APP
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; CHECK-NEXT: add r4, r12
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; CHECK-NEXT: @NO_APP
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; CHECK-NEXT: add r0, r4
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; CHECK-NEXT: bne .LBB1_2
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; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup
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; CHECK-NEXT: pop {r4, pc}
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; CHECK-NEXT: .LBB1_4:
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; CHECK-NEXT: movs r0, #0
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; CHECK-NEXT: pop {r4, pc}
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entry:
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%cmp9 = icmp sgt i32 %n, 0
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br i1 %cmp9, label %for.body, label %for.cond.cleanup
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for.cond.cleanup: ; preds = %for.body, %entry
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%s.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ]
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ret i32 %s.0.lcssa
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for.body: ; preds = %entry, %for.body
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%s.011 = phi i32 [ %add, %for.body ], [ 0, %entry ]
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%i.010 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds i16, i16* %x, i32 %i.010
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%0 = load i16, i16* %arrayidx, align 2
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%arrayidx1 = getelementptr inbounds i16, i16* %y, i32 %i.010
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%1 = load i16, i16* %arrayidx1, align 2
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%2 = tail call i32 asm "add $0, $1, $2", "=r,r,r,~{lr}"(i16 %0, i16 %1) #1
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%add = add nsw i32 %2, %s.011
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%inc = add nuw nsw i32 %i.010, 1
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%exitcond.not = icmp eq i32 %inc, %n
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
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}
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