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5bcab24086
Support atomic exchange and atomic compare and exchange instructions. Change CAS and TS1AM instructions for ISel patterns. Add selectADDRzi pattern for them. Add TS1AM pseudo instruction also for better ISel. Add shouldExpandAtomicRMWInIR() function to expand all atomicrmw instructions except atomicrmw xchg. Add custom lower for i8/i16 atomicrmw xchg. Modify replaceFI to support CAS/TS1AM instructions which use "reg+disp" operands instead of "reg+imm+disp" operands. And, add several regression tests to check the correctness. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D93161 |
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| .. | ||
| AsmParser | ||
| Disassembler | ||
| MCTargetDesc | ||
| TargetInfo | ||
| CMakeLists.txt | ||
| LVLGen.cpp | ||
| VE.h | ||
| VE.td | ||
| VEAsmPrinter.cpp | ||
| VECallingConv.td | ||
| VEFrameLowering.cpp | ||
| VEFrameLowering.h | ||
| VEInstrFormats.td | ||
| VEInstrInfo.cpp | ||
| VEInstrInfo.h | ||
| VEInstrInfo.td | ||
| VEInstrIntrinsicVL.gen.td | ||
| VEInstrIntrinsicVL.td | ||
| VEInstrPatternsVec.td | ||
| VEInstrVec.td | ||
| VEISelDAGToDAG.cpp | ||
| VEISelLowering.cpp | ||
| VEISelLowering.h | ||
| VEMachineFunctionInfo.cpp | ||
| VEMachineFunctionInfo.h | ||
| VEMCInstLower.cpp | ||
| VERegisterInfo.cpp | ||
| VERegisterInfo.h | ||
| VERegisterInfo.td | ||
| VESubtarget.cpp | ||
| VESubtarget.h | ||
| VETargetMachine.cpp | ||
| VETargetMachine.h | ||
| VETargetTransformInfo.h | ||
| VVPInstrInfo.td | ||
| VVPInstrPatternsVec.td | ||
| VVPNodes.def | ||