Simon Pilgrim 2c261c0586 [X86] Add SSE2+SSE3 common check prefix to psubus tests ... Noticed by @pengfei on D96703		2021-02-15 14:07:11 +00:00
..
AArch64	[CodeGen][SelectionDAG]Add new intrinsic experimental.vector.reverse	2021-02-15 13:39:43 +00:00
AMDGPU	[AMDGPU] Add llvm.amdgcn.wqm.demote intrinsic	2021-02-15 08:45:46 +09:00
ARC
ARM	[ARM] Extend search for increment in load/store optimizer	2021-02-15 13:17:21 +00:00
AVR	[AVR] Fix a bug in 16-bit shifts	2021-02-14 11:54:55 +08:00
BPF
Generic	[CodeGen] New pass: Replace vector intrinsics with call to vector library	2021-02-12 12:53:27 -05:00
Hexagon
Inputs
Lanai
Mips	[DAGCombiner] Remove (sra (shl X, C), C) if X has more than C sign bits.	2021-02-03 10:18:40 -08:00
MIR
MSP430
NVPTX	[NVPTX][NewPM] Re-enable NVVMReflectPass	2021-02-08 13:58:17 -08:00
PowerPC	[test] Make ELF tests less reliant on the lexicographical order of non-local symbols	2021-02-13 01:01:06 -08:00
RISCV	[RISCV] Add i16 bswap and i8/i16 bitreverse tests to the Zbp tests. NFC	2021-02-14 18:44:26 -08:00
SPARC
SystemZ
Thumb
Thumb2	[ARM] Extend search for increment in load/store optimizer	2021-02-15 13:17:21 +00:00
VE
WebAssembly	[WebAssemblly] Fix rethrow's argument computation	2021-02-13 03:43:15 -08:00
WinCFGuard
WinEH
X86	[X86] Add SSE2+SSE3 common check prefix to psubus tests	2021-02-15 14:07:11 +00:00
XCore