1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 12:43:36 +01:00
llvm-mirror/test/MC
Stanislav Mekhanoshin 771ecdbd33 [AMDGPU] return Fail instead of SolfFail from addOperand()
addOperand() method of AMDGPU disassembler returns SoftFail
on error. All instances which may lead to that place are
an impossible encdoing, not something which is possible to
encode, but semantically incorrect as described for SoftFail.

Then tablegen generates a check of the following form:

if (Decode...(..) == MCDisassembler::Fail) { return MCDisassembler::Fail; }

Since we can only return Success and SoftFail that is dead
code as detected by the static code analyzer.

Solution: return Fail as it should be.

See https://bugs.llvm.org/show_bug.cgi?id=43886

Differential Revision: https://reviews.llvm.org/D69819
2019-11-05 10:25:27 -08:00
..
AArch64 [AArch64] Adding support for PMMIR_EL1 register 2019-10-18 12:40:29 +00:00
AMDGPU [AMDGPU][MC][GFX10] Added v_interp_[p1/p2/mov]_f32_e64 2019-10-28 15:03:43 +03:00
ARM Always flush pending errors in MCAsmParser 2019-10-25 00:48:12 +02:00
AsmParser Revert "[ARM] Uses "Sun Style" syntax for section switching" 2019-10-25 14:03:07 -07:00
AVR
BPF
COFF [llvm-objdump] Further rearrange llvm-objdump sections for compatability 2019-10-03 22:01:08 +00:00
Disassembler [AMDGPU] return Fail instead of SolfFail from addOperand() 2019-11-05 10:25:27 -08:00
ELF Added support for "#pragma clang section relro=<name>" 2019-10-15 18:31:10 +00:00
Hexagon
Lanai
MachO
Mips [mips] Move test case for Octeon instructions to cnmips sub-folder. NFC 2019-11-04 00:42:31 +03:00
MSP430
PowerPC [PowerPC] Support extended mnemonics mffprwz etc. 2019-08-29 21:53:59 +00:00
RISCV [RISCV] Add obsolete aliases of fscsr, frcsr (fssr, frsr) 2019-10-03 15:47:28 +00:00
Sparc
SystemZ [SystemZ] Improve handling of huge PC relative immediate offsets. 2019-11-04 10:38:18 +01:00
WebAssembly [WebAssembly] Add experimental SIMD dot product instruction 2019-11-01 10:45:48 -07:00
X86 [X86] Teach X86MCodeEmitter to properly encode zmm16-zmm31 as index register to vgatherpf/vscatterpf. 2019-10-14 23:48:24 +00:00