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9a52db01f4
Summary: Add regression tests of asmparser, mccodeemitter, and disassembler for transfer control instructions. Add FENCEI/FENCEM/FENCEC/SVOB instructions also. Add new instruction format to represent FENCE* instructions too. Differential Revision: https://reviews.llvm.org/D81440
49 lines
1.3 KiB
ArmAsm
49 lines
1.3 KiB
ArmAsm
# RUN: llvm-mc -triple=ve --show-encoding < %s \
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# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
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# RUN: | FileCheck %s --check-prefixes=CHECK-INST
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# CHECK-INST: fencei
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# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x20]
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fencei
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# CHECK-INST: fencem 1
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# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x20]
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fencem 1
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# CHECK-INST: fencem 2
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# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x20]
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fencem 2
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# CHECK-INST: fencem 3
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# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x20]
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fencem 3
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# CHECK-INST: fencec 1
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# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x20]
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fencec 1
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# CHECK-INST: fencec 2
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# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x20]
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fencec 2
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# CHECK-INST: fencec 3
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# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x20]
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fencec 3
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# CHECK-INST: fencec 4
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# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x20]
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fencec 4
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# CHECK-INST: fencec 5
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# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x05,0x00,0x20]
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fencec 5
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# CHECK-INST: fencec 6
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# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x20]
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fencec 6
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# CHECK-INST: fencec 7
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# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x20]
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fencec 7
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