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llvm-mirror/include/llvm/Target
Alex Lorenz 2e08d769c3 MIR Serialization: Connect the machine function analysis pass to the MIR parser.
This commit connects the machine function analysis pass (which creates machine
functions) to the MIR parser, which will initialize the machine functions 
with the state from the MIR file and reconstruct the machine IR.

This commit introduces a new interface called 'MachineFunctionInitializer',
which can be used to provide custom initialization for the machine functions.

This commit also introduces a new diagnostic class called 
'DiagnosticInfoMIRParser' which is used for MIR parsing errors.
This commit modifies the default diagnostic handling in LLVMContext - now the
the diagnostics are printed directly into llvm::errs() so that the MIR parsing 
errors can be printed with colours.  

Reviewers: Justin Bogner

Differential Revision: http://reviews.llvm.org/D9928

llvm-svn: 239753
2015-06-15 20:30:22 +00:00
..
CostTable.h
Target.td [CodeGen] Introduce a FAULTING_LOAD_OP pseudo-op. 2015-06-15 18:44:08 +00:00
TargetCallingConv.h Add missing #include and forward decl, found by modules build. 2015-05-12 21:49:03 +00:00
TargetCallingConv.td [mips] Remove MipsCC::analyzeCallOperands in favour of CCState::AnalyzeCallOperands. NFC 2014-11-07 11:43:49 +00:00
TargetFrameLowering.h [ShrinkWrap] Add a target hook to check whether or not 2015-05-27 06:25:48 +00:00
TargetInstrInfo.h [TargetInstrInfo] Add new hook: AnalyzeBranchPredicate. 2015-06-15 18:44:21 +00:00
TargetIntrinsicInfo.h Removing LLVM_DELETED_FUNCTION, as MSVC 2012 was the last reason for requiring the macro. NFC; LLVM edition. 2015-02-15 22:54:22 +00:00
TargetItinerary.td
TargetLowering.h Add isLegalAddressingMode address space argument to TTI 2015-06-07 20:12:03 +00:00
TargetLoweringObjectFile.h Move alignment from MCSectionData to MCSection. 2015-05-21 19:20:38 +00:00
TargetMachine.h MIR Serialization: Connect the machine function analysis pass to the MIR parser. 2015-06-15 20:30:22 +00:00
TargetOpcodes.h [CodeGen] Introduce a FAULTING_LOAD_OP pseudo-op. 2015-06-15 18:44:08 +00:00
TargetOptions.h Remove DisableTailCalls from TargetOptions and the code in resetTargetOptions 2015-06-09 19:07:19 +00:00
TargetRecip.h make reciprocal estimate code generation more flexible by adding command-line options (3rd try) 2015-06-04 01:32:35 +00:00
TargetRegisterInfo.h Clarify that higher priority means higher values. 2015-03-31 20:04:46 +00:00
TargetSchedule.td Move Post RA Scheduling flag bit into SchedMachineModel 2014-07-15 22:39:58 +00:00
TargetSelectionDAG.td Add SDNodes for umin, umax, smin and smax. 2015-05-15 09:03:15 +00:00
TargetSelectionDAGInfo.h Removing LLVM_DELETED_FUNCTION, as MSVC 2012 was the last reason for requiring the macro. NFC; LLVM edition. 2015-02-15 22:54:22 +00:00
TargetSubtargetInfo.h Rename TargetSubtargetInfo::enablePostMachineScheduler() to enablePostRAScheduler() 2015-06-13 03:42:16 +00:00