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0ed05f79e1
The R_ARM_PLT32 relocation is deprecated and is not produced by MC. This means that the code being deleted is dead from the .o point of view and was making the .s more confusing. llvm-svn: 272909
273 lines
5.7 KiB
LLVM
273 lines
5.7 KiB
LLVM
; RUN: llc -emulated-tls -mtriple=arm-linux-android \
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; RUN: -relocation-model=pic < %s | FileCheck -check-prefix=ARM32 %s
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; Copied from X86/emutls.ll
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; Use my_emutls_get_address like __emutls_get_address.
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@my_emutls_v_xyz = external global i8*, align 4
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declare i8* @my_emutls_get_address(i8*)
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define i32 @my_get_xyz() {
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; ARM32-LABEL: my_get_xyz:
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; ARM32: ldr r0,
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; ARM32: ldr r0, [pc, r0]
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; ARM32-NEXT: bl my_emutls_get_address
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; ARM32-NEXT: ldr r0, [r0]
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; ARM32: .long my_emutls_v_xyz(GOT_PREL)
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entry:
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%call = call i8* @my_emutls_get_address(i8* bitcast (i8** @my_emutls_v_xyz to i8*))
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%0 = bitcast i8* %call to i32*
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%1 = load i32, i32* %0, align 4
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ret i32 %1
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}
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@i1 = thread_local global i32 15
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@i2 = external thread_local global i32
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@i3 = internal thread_local global i32 15
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@i4 = hidden thread_local global i32 15
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@i5 = external hidden thread_local global i32
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@s1 = thread_local global i16 15
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@b1 = thread_local global i8 0
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define i32 @f1() {
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; ARM32-LABEL: f1:
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; ARM32: ldr r0,
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; ARM32: ldr r0, [pc, r0]
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; ARM32-NEXT: bl __emutls_get_address
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; ARM32-NEXT: ldr r0, [r0]
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; ARM32: .long __emutls_v.i1(GOT_PREL)
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entry:
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%tmp1 = load i32, i32* @i1
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ret i32 %tmp1
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}
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define i32* @f2() {
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; ARM32-LABEL: f2:
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; ARM32: ldr r0,
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; ARM32: ldr r0, [pc, r0]
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; ARM32-NEXT: bl __emutls_get_address
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; ARM32-NEXT: pop
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; ARM32: .long __emutls_v.i1(GOT_PREL)
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entry:
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ret i32* @i1
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}
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define i32 @f3() nounwind {
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; ARM32-LABEL: f3:
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; ARM32: ldr r0,
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; ARM32: ldr r0, [pc, r0]
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; ARM32-NEXT: bl __emutls_get_address
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; ARM32-NEXT: ldr r0, [r0]
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; ARM32: .long __emutls_v.i2(GOT_PREL)
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entry:
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%tmp1 = load i32, i32* @i2
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ret i32 %tmp1
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}
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define i32* @f4() {
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; ARM32-LABEL: f4:
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; ARM32: ldr r0,
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; ARM32: ldr r0, [pc, r0]
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; ARM32-NEXT: bl __emutls_get_address
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; ARM32-NEXT: pop
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; ARM32: .long __emutls_v.i2(GOT_PREL)
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entry:
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ret i32* @i2
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}
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define i32 @f5() nounwind {
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; ARM32-LABEL: f5:
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; ARM32: ldr r0,
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; ARM32: add r0, pc, r0
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; ARM32-NEXT: bl __emutls_get_address
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; ARM32-NEXT: ldr r0, [r0]
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; ARM32: .long __emutls_v.i3-
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entry:
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%tmp1 = load i32, i32* @i3
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ret i32 %tmp1
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}
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define i32* @f6() {
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; ARM32-LABEL: f6:
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; ARM32: ldr r0,
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; ARM32: add r0, pc, r0
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; ARM32-NEXT: bl __emutls_get_address
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; ARM32-NEXT: pop
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; ARM32: .long __emutls_v.i3-
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entry:
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ret i32* @i3
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}
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define i32 @f7() {
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; ARM32-LABEL: f7:
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; ARM32: ldr r0,
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; ARM32: add r0, pc, r0
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; ARM32-NEXT: bl __emutls_get_address
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; ARM32-NEXT: ldr r0, [r0]
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; ARM32: .long __emutls_v.i4-(.LPC
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entry:
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%tmp1 = load i32, i32* @i4
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ret i32 %tmp1
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}
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define i32* @f8() {
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; ARM32-LABEL: f8:
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; ARM32: ldr r0,
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; ARM32: add r0, pc, r0
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; ARM32-NEXT: bl __emutls_get_address
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; ARM32-NEXT: pop
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; ARM32: .long __emutls_v.i4-(.LPC
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entry:
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ret i32* @i4
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}
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define i32 @f9() {
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; ARM32-LABEL: f9:
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; ARM32: ldr r0,
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; ARM32: add r0, pc, r0
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; ARM32-NEXT: bl __emutls_get_address
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; ARM32-NEXT: ldr r0, [r0]
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entry:
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%tmp1 = load i32, i32* @i5
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ret i32 %tmp1
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}
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define i32* @f10() {
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; ARM32-LABEL: f10:
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; ARM32: ldr r0,
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; ARM32: add r0, pc, r0
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; ARM32-NEXT: bl __emutls_get_address
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; ARM32-NEXT: pop
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entry:
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ret i32* @i5
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}
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define i16 @f11() {
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; ARM32-LABEL: f11:
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; ARM32: ldr r0,
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; ARM32: ldr r0, [pc, r0]
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; ARM32-NEXT: bl __emutls_get_address
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; ARM32-NEXT: ldrh r0, [r0]
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entry:
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%tmp1 = load i16, i16* @s1
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ret i16 %tmp1
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}
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define i32 @f12() {
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; ARM32-LABEL: f12:
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; ARM32: ldr r0,
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; ARM32: ldr r0, [pc, r0]
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; ARM32-NEXT: bl __emutls_get_address
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; ARM32-NEXT: ldrsh r0, [r0]
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entry:
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%tmp1 = load i16, i16* @s1
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%tmp2 = sext i16 %tmp1 to i32
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ret i32 %tmp2
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}
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define i8 @f13() {
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; ARM32-LABEL: f13:
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; ARM32: ldr r0,
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; ARM32: ldr r0, [pc, r0]
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; ARM32-NEXT: bl __emutls_get_address
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; ARM32-NEXT: ldrb r0, [r0]
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; ARM32-NEXT: pop
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entry:
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%tmp1 = load i8, i8* @b1
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ret i8 %tmp1
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}
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define i32 @f14() {
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; ARM32-LABEL: f14:
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; ARM32: ldr r0,
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; ARM32: ldr r0, [pc, r0]
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; ARM32-NEXT: bl __emutls_get_address
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; ARM32-NEXT: ldrsb r0, [r0]
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; ARM32-NEXT: pop
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entry:
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%tmp1 = load i8, i8* @b1
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%tmp2 = sext i8 %tmp1 to i32
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ret i32 %tmp2
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}
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;;;;;;;;;;;;;; 32-bit __emutls_v. and __emutls_t.
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; ARM32: .data{{$}}
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; ARM32: .globl __emutls_v.i1
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; ARM32-LABEL: __emutls_v.i1:
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; ARM32-NEXT: .long 4
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; ARM32-NEXT: .long 4
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; ARM32-NEXT: .long 0
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; ARM32-NEXT: .long __emutls_t.i1
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; ARM32: .section .rodata,
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; ARM32-LABEL: __emutls_t.i1:
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; ARM32-NEXT: .long 15
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; ARM32-NOT: __emutls_v.i2
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; ARM32: .data{{$}}
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; ARM32-NOT: .globl
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; ARM32-LABEL: __emutls_v.i3:
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; ARM32-NEXT: .long 4
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; ARM32-NEXT: .long 4
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; ARM32-NEXT: .long 0
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; ARM32-NEXT: .long __emutls_t.i3
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; ARM32: .section .rodata,
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; ARM32-LABEL: __emutls_t.i3:
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; ARM32-NEXT: .long 15
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; ARM32: .data{{$}}
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; ARM32: .globl __emutls_v.i4
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; ARM32-LABEL: __emutls_v.i4:
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; ARM32-NEXT: .long 4
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; ARM32-NEXT: .long 4
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; ARM32-NEXT: .long 0
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; ARM32-NEXT: .long __emutls_t.i4
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; ARM32: .section .rodata,
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; ARM32-LABEL: __emutls_t.i4:
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; ARM32-NEXT: .long 15
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; ARM32-NOT: __emutls_v.i5:
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; ARM32: .hidden __emutls_v.i5
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; ARM32-NOT: __emutls_v.i5:
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; ARM32: .data{{$}}
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; ARM32: .globl __emutls_v.s1
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; ARM32-LABEL: __emutls_v.s1:
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; ARM32-NEXT: .long 2
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; ARM32-NEXT: .long 2
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; ARM32-NEXT: .long 0
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; ARM32-NEXT: .long __emutls_t.s1
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; ARM32 .section .rodata,
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; ARM32-LABEL: __emutls_t.s1:
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; ARM32-NEXT: .short 15
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; ARM32: .data{{$}}
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; ARM32: .globl __emutls_v.b1
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; ARM32-LABEL: __emutls_v.b1:
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; ARM32-NEXT: .long 1
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; ARM32-NEXT: .long 1
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; ARM32-NEXT: .long 0
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; ARM32-NEXT: .long 0
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; ARM32-NOT: __emutls_t.b1
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