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c43ce3d9fa
For multiprecision arithmetic on MIPS, rather than using ISD::ADDE / ISD::ADDC,
get SelectionDAG to break down the operation into ISD::ADDs and ISD::SETCCs.
For MIPS, only the DSP ASE has a carry flag, so in the general case it is not
useful to directly support ISD::{ADDE, ADDC, SUBE, SUBC} nodes.
Also improve the generation code in such cases for targets with
TargetLoweringBase::ZeroOrOneBooleanContent by directly using the result of the
comparison node rather than using it in selects. Similarly for ISD::SUBE /
ISD::SUBC.
Address optimization breakage by moving the generation of MIPS specific integer
multiply-accumulate nodes to before legalization.
This revolves PR32713 and PR33424.
Thanks to Simonas Kazlauskas and Pirama Arumuga Nainar for reporting the issue!
Reviewers: slthakur
Differential Revision: https://reviews.llvm.org/D33494
The previous version of this patch was too aggressive in producing fused
integer multiple-addition instructions.
llvm-svn: 307906
51 lines
1.4 KiB
LLVM
51 lines
1.4 KiB
LLVM
; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
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@i = global i64 4294967295, align 8
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@j = global i64 15, align 8
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@ii = global i64 4294967295, align 8
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@k = common global i64 0, align 8
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@l = common global i64 0, align 8
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@m = common global i64 0, align 8
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define void @test1() nounwind {
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entry:
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%0 = load i64, i64* @i, align 8
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%1 = load i64, i64* @j, align 8
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%add = add nsw i64 %1, %0
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store i64 %add, i64* @k, align 8
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; 16: addu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
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; 16: addu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
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; 16: sltu ${{[0-9]+}}, ${{[0-9]+}}
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; 16: move ${{[0-9]+}}, $24
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; 16: addu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
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ret void
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}
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define void @test2() nounwind {
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entry:
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%0 = load i64, i64* @i, align 8
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%1 = load i64, i64* @j, align 8
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%sub = sub nsw i64 %0, %1
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; 16: subu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
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; 16: sltu ${{[0-9]+}}, ${{[0-9]+}}
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; 16: move ${{[0-9]+}}, $24
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; 16: subu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
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; 16: subu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
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store i64 %sub, i64* @l, align 8
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ret void
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}
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define void @test3() nounwind {
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entry:
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%0 = load i64, i64* @ii, align 8
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%add = add nsw i64 %0, 15
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; 16: addiu ${{[0-9]+}}, 15
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; 16: sltu ${{[0-9]+}}, ${{[0-9]+}}
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; 16: move ${{[0-9]+}}, $24
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; 16: addu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
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store i64 %add, i64* @m, align 8
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ret void
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}
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