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7d64810efd
The benchmarking summarized in http://lists.llvm.org/pipermail/llvm-dev/2017-May/113525.html showed this is beneficial for a wide range of cores. As is to be expected, quite a few small adaptations are needed to the regressions tests, as the difference in scheduling results in: - Quite a few small instruction schedule differences. - A few changes in register allocation decisions caused by different instruction schedules. - A few changes in IfConversion decisions, due to a difference in instruction schedule and/or the estimated cost of a branch mispredict. llvm-svn: 306514
91 lines
2.0 KiB
LLVM
91 lines
2.0 KiB
LLVM
; RUN: llc < %s -mtriple arm-eabi -mattr=+v6t2 | FileCheck %s
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; RUN: llc < %s -mtriple arm-eabi -mattr=+v6t2 -mattr=+neon | FileCheck %s
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; This test checks the @llvm.cttz.* intrinsics for integers.
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declare i8 @llvm.cttz.i8(i8, i1)
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declare i16 @llvm.cttz.i16(i16, i1)
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declare i32 @llvm.cttz.i32(i32, i1)
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declare i64 @llvm.cttz.i64(i64, i1)
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;------------------------------------------------------------------------------
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define i8 @test_i8(i8 %a) {
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; CHECK-LABEL: test_i8:
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; CHECK: orr [[REG:r[0-9]+]], [[REG]], #256
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; CHECK: rbit
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; CHECK: clz
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%tmp = call i8 @llvm.cttz.i8(i8 %a, i1 false)
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ret i8 %tmp
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}
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define i16 @test_i16(i16 %a) {
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; CHECK-LABEL: test_i16:
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; CHECK: orr [[REG:r[0-9]+]], [[REG]], #65536
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; CHECK: rbit
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; CHECK: clz
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%tmp = call i16 @llvm.cttz.i16(i16 %a, i1 false)
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ret i16 %tmp
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}
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define i32 @test_i32(i32 %a) {
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; CHECK-LABEL: test_i32:
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; CHECK: rbit
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; CHECK: clz
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%tmp = call i32 @llvm.cttz.i32(i32 %a, i1 false)
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ret i32 %tmp
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}
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define i64 @test_i64(i64 %a) {
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; CHECK-LABEL: test_i64:
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; CHECK: rbit
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; CHECK: rbit
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; CHECK: clz
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; CHECK: cmp
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; CHECK: add
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; CHECK: clzne
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%tmp = call i64 @llvm.cttz.i64(i64 %a, i1 false)
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ret i64 %tmp
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}
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;------------------------------------------------------------------------------
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define i8 @test_i8_zero_undef(i8 %a) {
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; CHECK-LABEL: test_i8_zero_undef:
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; CHECK-NOT: orr
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; CHECK: rbit
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; CHECK: clz
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%tmp = call i8 @llvm.cttz.i8(i8 %a, i1 true)
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ret i8 %tmp
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}
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define i16 @test_i16_zero_undef(i16 %a) {
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; CHECK-LABEL: test_i16_zero_undef:
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; CHECK-NOT: orr
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; CHECK: rbit
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; CHECK: clz
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%tmp = call i16 @llvm.cttz.i16(i16 %a, i1 true)
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ret i16 %tmp
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}
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define i32 @test_i32_zero_undef(i32 %a) {
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; CHECK-LABEL: test_i32_zero_undef:
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; CHECK: rbit
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; CHECK: clz
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%tmp = call i32 @llvm.cttz.i32(i32 %a, i1 true)
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ret i32 %tmp
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}
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define i64 @test_i64_zero_undef(i64 %a) {
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; CHECK-LABEL: test_i64_zero_undef:
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; CHECK: rbit
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; CHECK: rbit
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; CHECK: clz
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; CHECK: cmp
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; CHECK: add
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; CHECK: clzne
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%tmp = call i64 @llvm.cttz.i64(i64 %a, i1 true)
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ret i64 %tmp
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}
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