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* CPRCs may be allocated to co-processor registers or the stack – they may never be allocated to core registers * When a CPRC is allocated to the stack, all other VFP registers should be marked as unavailable The difference is only noticeable in rare cases where there are a large number of floating point arguments (e.g. 7 doubles + additional float, double arguments). Although it's probably still better to avoid vmov as it can cause stalls in some older ARM cores. The other, more subtle benefit, is to minimize difference between the various calling conventions. rdar://16039676 llvm-svn: 201193
41 lines
1.3 KiB
LLVM
41 lines
1.3 KiB
LLVM
; RUN: llc < %s -mtriple=armv7-apple-ios -mattr=+vfp2 | FileCheck %s
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define fastcc double @t1(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, float %a, float %b) {
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entry:
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; CHECK-LABEL: t1:
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; CHECK-NOT: vmov
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; CHECK: vldr
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%add = fadd float %a, %b
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%conv = fpext float %add to double
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ret double %conv
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}
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define fastcc double @t2(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, double %a, float %b, double %c) {
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entry:
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; CHECK-LABEL: t2:
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; CHECK-NOT: vmov
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; CHECK: vldr
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%add = fadd double %a, %c
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ret double %add
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}
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define fastcc float @t3(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, float %a, double %b, float %c) {
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entry:
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; CHECK-LABEL: t3:
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; CHECK: vldr
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%add = fadd float %a, %c
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ret float %add
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}
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define fastcc double @t4(double %a, double %b) #0 {
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entry:
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; CHECK-LABEL: t4:
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; CHECK: vstr
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%add = fadd double %a, %b
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%sub = fsub double %a, %b
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%call = tail call fastcc double @x(double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double %add, float 0.000000e+00, double %sub) #2
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ret double %call
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}
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declare fastcc double @x(double, double, double, double, double, double, double, float, double)
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