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f7ea499702
Part of the effort to refactoring frame pointer code generation. We used to use two function attributes "no-frame-pointer-elim" and "no-frame-pointer-elim-non-leaf" to represent three kinds of frame pointer usage: (all) frames use frame pointer, (non-leaf) frames use frame pointer, (none) frame use frame pointer. This CL makes the idea explicit by using only one enum function attribute "frame-pointer" Option "-frame-pointer=" replaces "-disable-fp-elim" for tools such as llc. "no-frame-pointer-elim" and "no-frame-pointer-elim-non-leaf" are still supported for easy migration to "frame-pointer". tests are mostly updated with // replace command line args ‘-disable-fp-elim=false’ with ‘-frame-pointer=none’ grep -iIrnl '\-disable-fp-elim=false' * | xargs sed -i '' -e "s/-disable-fp-elim=false/-frame-pointer=none/g" // replace command line args ‘-disable-fp-elim’ with ‘-frame-pointer=all’ grep -iIrnl '\-disable-fp-elim' * | xargs sed -i '' -e "s/-disable-fp-elim/-frame-pointer=all/g" Patch by Yuanfang Chen (tabloid.adroit)! Differential Revision: https://reviews.llvm.org/D56351 llvm-svn: 351049
28 lines
1.1 KiB
LLVM
28 lines
1.1 KiB
LLVM
; RUN: llc <%s -mtriple=arm-none-eabi 2>&1 | FileCheck %s -check-prefix=CHECK
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; RUN: llc <%s -mtriple=arm-none-eabi -relocation-model=rwpi 2>&1 \
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; RUN: | FileCheck %s -check-prefix=RWPI
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; RUN: llc <%s -mtriple=arm-none-eabi --frame-pointer=all 2>&1 \
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; RUN: | FileCheck %s -check-prefix=NO_FP_ELIM
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; CHECK: warning: inline asm clobber list contains reserved registers: SP, PC
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; CHECK: warning: inline asm clobber list contains reserved registers: R11
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; RWPI: warning: inline asm clobber list contains reserved registers: R9, SP, PC
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; RWPI: warning: inline asm clobber list contains reserved registers: R11
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; NO_FP_ELIM: warning: inline asm clobber list contains reserved registers: R11, SP, PC
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; NO_FP_ELIM: warning: inline asm clobber list contains reserved registers: R11
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define void @foo() nounwind {
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call void asm sideeffect "mov r7, #1",
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"~{r9},~{r11},~{r12},~{lr},~{sp},~{pc},~{r10}"()
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ret void
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}
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define i32 @bar(i32 %i) {
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%vla = alloca i32, i32 %i, align 4
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tail call void asm sideeffect "mov r7, #1", "~{r11}"()
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%1 = load volatile i32, i32* %vla, align 4
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ret i32 %1
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}
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