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llvm-mirror/lib/Target/ARM/ARMRegisterBanks.td
Roman Tereshin 2d9d4134d1 [GlobalISel][ARM] Adding HPR and QPR regclasses to FPRB regbank
Also bringing ARMRegisterBankInfo::getRegBankFromRegClass
implementation up to speed with the *.td-definition.

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D43982

llvm-svn: 333056
2018-05-23 02:59:31 +00:00

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549 B
TableGen

//=- ARMRegisterBank.td - Describe the AArch64 Banks ---------*- tablegen -*-=//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
//
//===----------------------------------------------------------------------===//
def GPRRegBank : RegisterBank<"GPRB", [GPR, GPRwithAPSR]>;
def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;