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Post-RA sched strategy and scheduling instruction annotations for z196, zEC12 and z13. This scheduler optimizes decoder grouping and balances processor resources (including side steering the FPd unit instructions). The SystemZHazardRecognizer keeps track of the scheduling state, which can be dumped with -debug-only=misched. Reviers: Ulrich Weigand, Andrew Trick. https://reviews.llvm.org/D17260 llvm-svn: 284704
113 lines
3.5 KiB
C++
113 lines
3.5 KiB
C++
//==-- SystemZMachineScheduler.h - SystemZ Scheduler Interface -*- C++ -*---==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// -------------------------- Post RA scheduling ---------------------------- //
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// SystemZPostRASchedStrategy is a scheduling strategy which is plugged into
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// the MachineScheduler. It has a sorted Available set of SUs and a pickNode()
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// implementation that looks to optimize decoder grouping and balance the
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// usage of processor resources.
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//===----------------------------------------------------------------------===//
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#include "SystemZInstrInfo.h"
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#include "SystemZHazardRecognizer.h"
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#include "llvm/CodeGen/MachineScheduler.h"
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#include "llvm/Support/Debug.h"
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#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZMACHINESCHEDULER_H
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#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZMACHINESCHEDULER_H
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using namespace llvm;
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namespace llvm {
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/// A MachineSchedStrategy implementation for SystemZ post RA scheduling.
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class SystemZPostRASchedStrategy : public MachineSchedStrategy {
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ScheduleDAGMI *DAG;
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/// A candidate during instruction evaluation.
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struct Candidate {
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SUnit *SU;
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/// The decoding cost.
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int GroupingCost;
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/// The processor resources cost.
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int ResourcesCost;
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Candidate() : SU(nullptr), GroupingCost(0), ResourcesCost(0) {}
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Candidate(SUnit *SU_, SystemZHazardRecognizer &HazardRec);
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// Compare two candidates.
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bool operator<(const Candidate &other);
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// Check if this node is free of cost ("as good as any").
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bool inline noCost() {
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return (GroupingCost <= 0 && !ResourcesCost);
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}
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};
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// A sorter for the Available set that makes sure that SUs are considered
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// in the best order.
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struct SUSorter {
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bool operator() (SUnit *lhs, SUnit *rhs) const {
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if (lhs->isScheduleHigh && !rhs->isScheduleHigh)
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return true;
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if (!lhs->isScheduleHigh && rhs->isScheduleHigh)
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return false;
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if (lhs->getHeight() > rhs->getHeight())
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return true;
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else if (lhs->getHeight() < rhs->getHeight())
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return false;
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return (lhs->NodeNum < rhs->NodeNum);
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}
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};
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// A set of SUs with a sorter and dump method.
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struct SUSet : std::set<SUnit*, SUSorter> {
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#ifndef NDEBUG
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void dump(SystemZHazardRecognizer &HazardRec);
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#endif
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};
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/// The set of available SUs to schedule next.
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SUSet Available;
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// HazardRecognizer that tracks the scheduler state for the current
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// region.
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SystemZHazardRecognizer HazardRec;
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public:
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SystemZPostRASchedStrategy(const MachineSchedContext *C);
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/// PostRA scheduling does not track pressure.
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bool shouldTrackPressure() const override { return false; }
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/// Initialize the strategy after building the DAG for a new region.
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void initialize(ScheduleDAGMI *dag) override;
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/// Pick the next node to schedule, or return NULL.
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SUnit *pickNode(bool &IsTopNode) override;
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/// ScheduleDAGMI has scheduled an instruction - tell HazardRec
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/// about it.
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void schedNode(SUnit *SU, bool IsTopNode) override;
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/// SU has had all predecessor dependencies resolved. Put it into
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/// Available.
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void releaseTopNode(SUnit *SU) override;
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/// Currently only scheduling top-down, so this method is empty.
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void releaseBottomNode(SUnit *SU) override {};
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};
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} // namespace llvm
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#endif /* LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZMACHINESCHEDULER_H */
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