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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 18:54:02 +01:00
llvm-mirror/docs/GlobalISel
Jessica Paquette 840095b1e1 [GlobalISel] Add G_ASSERT_SEXT
This adds a G_ASSERT_SEXT opcode, similar to G_ASSERT_ZEXT. This instruction
signifies that an operation was already sign extended from a smaller type.

This is useful for functions with sign-extended parameters.

E.g.

```
define void @foo(i16 signext %x) {
 ...
}
```

This adds verifier, regbankselect, and instruction selection support for
G_ASSERT_SEXT equivalent to G_ASSERT_ZEXT.

Differential Revision: https://reviews.llvm.org/D96890
2021-02-17 13:10:34 -08:00
..
block-extract.png
GenericOpcode.rst [GlobalISel] Add G_ASSERT_SEXT 2021-02-17 13:10:34 -08:00
GMIR.rst [docs] Fix typos 2020-08-09 19:31:49 -07:00
index.rst
InstructionSelect.rst
IRTranslator.rst Update references to 'master' branch. 2020-12-21 19:10:34 +00:00
KnownBits.rst
Legalizer.rst GlobalISel: Make type for lower action more consistently optional 2020-08-17 16:24:55 -04:00
pipeline-overview-customized.png
pipeline-overview-with-combiners.png
pipeline-overview.png
Pipeline.rst
Porting.rst
RegBankSelect.rst
Resources.rst
testing-pass-level.png
testing-unit-level.png