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llvm-mirror/test/CodeGen
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Craig Topper 31e5c7940c [X86] Add test for v4i8 loop sad pattern. 
This cases produces a psadbw that doesn't need to be widened or
extracted so takes a slightly different code path in
combineLoopSADPattern.
2020-03-21 15:27:29 -07:00
..
AArch64
[DAGCombiner] Do not fold truncate(build_vector(..)) if it creates an illegal type
2020-03-20 09:20:16 -07:00
AMDGPU
AMDGPU: Add more tests for fshr
2020-03-20 11:01:51 -04:00
ARC
…
ARM
[NFC][ARM] Fix for buildbots
2020-03-19 15:50:13 +00:00
AVR
[AVR] Fix incorrect register state for LDRdPtr
2020-03-03 17:34:54 +08:00
BPF
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
Generic
[NFC] Add missing REQUIRES clause to a test
2020-03-18 16:35:10 +03:00
Hexagon
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
Inputs
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Lanai
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Mips
[GlobalISel] combine G_TRUNC with G_MERGE_VALUES
2020-03-16 14:42:01 +01:00
MIR
[AMDGPU] Move frame pointer from s34 to s33
2020-03-19 15:35:16 -04:00
MSP430
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NVPTX
ARM: Fixup some tests using denormal-fp-math attribute
2020-03-10 14:02:06 -04:00
PowerPC
[PowerPC][AIX][NFC] Extend the test coverage of ByVal args.
2020-03-20 12:19:08 -04:00
RISCV
[RISCV] Select +0.0 immediate using fmv.{w,d}.x / fcvt.d.w
2020-03-20 09:42:24 +00:00
SPARC
[Sparc] Fix incorrect operand for matching CMPri pattern
2020-03-02 11:36:32 +08:00
SystemZ
[TargetLowering] Only demand a rotation's modulo amount bits
2020-03-17 21:23:46 +00:00
Thumb
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
2020-03-15 17:46:23 -07:00
Thumb2
[ARM,MVE] Add ACLE intrinsics for the vaddv/vaddlv family.
2020-03-20 15:42:33 +00:00
VE
[VE] Target-specific bit size for sjljehprepare
2020-03-10 17:51:16 +01:00
WebAssembly
[WebAssembly] Support swiftself and swifterror for WebAssembly target
2020-03-19 17:39:52 -07:00
WinCFGuard
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WinEH
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X86
[X86] Add test for v4i8 loop sad pattern.
2020-03-21 15:27:29 -07:00
XCore
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