..
AsmParser
Revert r281336 (and r281337), it caused PR30372.
2016-09-13 18:17:00 +00:00
Disassembler
Replace "fallthrough" comments with LLVM_FALLTHROUGH
2016-08-17 05:10:15 +00:00
InstPrinter
MCTargetDesc
[MC] Move .cv_loc management logic out of MCContext
2016-08-26 17:58:37 +00:00
TargetInfo
Utils
AArch64.h
[AArch64] Register passes so they can be run by llc
2016-08-01 05:56:57 +00:00
AArch64.td
[AArch64] Adjust the feature set for Exynos M1.
2016-08-24 18:17:30 +00:00
AArch64A53Fix835769.cpp
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
2016-08-25 01:27:13 +00:00
AArch64A57FPLoadBalancing.cpp
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
2016-08-25 01:27:13 +00:00
AArch64AddressTypePromotion.cpp
[AArch64] Register passes so they can be run by llc
2016-08-01 05:56:57 +00:00
AArch64AdvSIMDScalarPass.cpp
[AArch64] Register passes so they can be run by llc
2016-08-01 05:56:57 +00:00
AArch64AsmPrinter.cpp
Use abstraction in AArch64AsmPrinter::lowerSTACKMAP. NFCI
2016-08-31 12:43:49 +00:00
AArch64BranchRelaxation.cpp
Finish renaming remaining analyzeBranch functions
2016-09-14 20:43:16 +00:00
AArch64CallingConvention.h
AArch64CallingConvention.td
GlobalISel[AArch64]: support pointer types in argument lowering.
2016-07-25 21:01:17 +00:00
AArch64CallLowering.cpp
GlobalISel: move type information to MachineRegisterInfo.
2016-09-09 11:46:34 +00:00
AArch64CallLowering.h
GlobalISel: use G_TYPE to annotate physregs with a type.
2016-08-31 21:24:02 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp
[AArch64] Register passes so they can be run by llc
2016-08-01 05:56:57 +00:00
AArch64CollectLOH.cpp
Replace incorrect "#ifdef DEBUG" with "#ifndef NDEBUG".
2016-08-30 03:16:16 +00:00
AArch64ConditionalCompares.cpp
Finish renaming remaining analyzeBranch functions
2016-09-14 20:43:16 +00:00
AArch64ConditionOptimizer.cpp
[AArch64] Register passes so they can be run by llc
2016-08-01 05:56:57 +00:00
AArch64DeadRegisterDefinitionsPass.cpp
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
2016-08-25 01:27:13 +00:00
AArch64ExpandPseudoInsts.cpp
AArch64FastISel.cpp
Swift Calling Convetion: add support for AArch64.
2016-08-26 19:28:17 +00:00
AArch64FrameLowering.cpp
Move helpers into anonymous namespaces. NFC.
2016-08-06 11:13:10 +00:00
AArch64FrameLowering.h
AArch64InstrAtomics.td
AArch64: properly calculate cmpxchg status in FastISel.
2016-08-02 20:22:36 +00:00
AArch64InstrFormats.td
[SelectionDAG] Rename fextend -> fpextend, fround -> fpround, frnd -> fround
2016-08-18 20:08:15 +00:00
AArch64InstrInfo.cpp
[AArch64] Support for FP FMA when -ffp-contract=fast
2016-09-15 19:55:23 +00:00
AArch64InstrInfo.h
Finish renaming remaining analyzeBranch functions
2016-09-14 20:43:16 +00:00
AArch64InstrInfo.td
[AArch64] Avoid materializing constant 1 by using csinc, rather than csel.
2016-08-26 14:01:55 +00:00
AArch64InstructionSelector.cpp
GlobalISel: remove "unsized" LLT
2016-09-15 10:09:59 +00:00
AArch64InstructionSelector.h
[GlobalISel] Introduce an instruction selector.
2016-07-27 14:31:55 +00:00
AArch64ISelDAGToDAG.cpp
getValueType().getSizeInBits() -> getValueSizeInBits() ; NFCI
2016-09-14 16:05:51 +00:00
AArch64ISelLowering.cpp
getVectorElementType().getSizeInBits() -> getScalarSizeInBits() ; NFCI
2016-09-14 16:37:15 +00:00
AArch64ISelLowering.h
AArch64: Cleanup tailcall CC check, enable swiftcc.
2016-09-13 19:27:38 +00:00
AArch64LoadStoreOptimizer.cpp
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
2016-08-25 01:27:13 +00:00
AArch64MachineFunctionInfo.h
[AArch64] Mark various *Info classes as 'final'. NFC.
2016-07-27 14:31:46 +00:00
AArch64MachineLegalizer.cpp
GlobalISel: legalize GEP instructions with small offsets.
2016-09-15 11:02:19 +00:00
AArch64MachineLegalizer.h
Fix include case. NFC.
2016-07-22 20:15:19 +00:00
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp
[AArch64] Register passes so they can be run by llc
2016-08-01 05:56:57 +00:00
AArch64RedundantCopyElimination.cpp
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
2016-08-25 01:27:13 +00:00
AArch64RegisterBankInfo.cpp
GlobalISel: remove "unsized" LLT
2016-09-15 10:09:59 +00:00
AArch64RegisterBankInfo.h
[AArch64] Mark various *Info classes as 'final'. NFC.
2016-07-27 14:31:46 +00:00
AArch64RegisterInfo.cpp
MachineFunction: Return reference for getFrameInfo(); NFC
2016-07-28 18:40:00 +00:00
AArch64RegisterInfo.h
[AArch64] Mark various *Info classes as 'final'. NFC.
2016-07-27 14:31:46 +00:00
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64SchedKryo.td
AArch64SchedKryoDetails.td
AArch64SchedM1.td
[AArch64] Adjust the scheduling model for Exynos M1.
2016-09-06 19:22:29 +00:00
AArch64Schedule.td
AArch64SchedVulcan.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp
[AArch64] Register passes so they can be run by llc
2016-08-01 05:56:57 +00:00
AArch64Subtarget.cpp
[GlobalISel] Introduce an instruction selector.
2016-07-27 14:31:55 +00:00
AArch64Subtarget.h
[GlobalISel] Introduce an instruction selector.
2016-07-27 14:31:55 +00:00
AArch64SystemOperands.td
AArch64TargetMachine.cpp
[AArch64] Register passes so they can be run by llc
2016-08-01 05:56:57 +00:00
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp
AArch64TargetTransformInfo.h
CMakeLists.txt
[GlobalISel] Introduce an instruction selector.
2016-07-27 14:31:55 +00:00
LLVMBuild.txt