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llvm-mirror/unittests
Cullen Rhodes fcd9253fa0 [AArch64][SME] Add matrix register definitions and parsing support
SME introduces the ZA array, a new piece of architectural register state
consisting of a matrix of [SVLb x SVLb] bytes, where SVL is the
implementation defined Streaming SVE vector length and SVLb is the
number of 8-bit elements in a vector of SVL bits.

SME instructions consist of three types of matrix operands:

  * Tiles: a ZA tile is a square, two-dimensional sub-array of elements
  within the ZA array. These tiles make up the larger accumulator array
  and the granularity varies based on the element size, i.e.
    - ZAQ0..ZAQ15 (smallest tile granule)
    - ZAD0..ZAD7
    - ZAS0..ZAS3
    - ZAH0..ZAH1
    or ZAB0       (largest tile granule, single tile)
  * Tile vectors: similar to regular tiles, but have an extra 'h' or 'v'
  to tell how the vector at [reg+offset] is layed out in the tile,
  horizontally or vertically. E.g. za1h.h or za15v.q, which corresponds
  to vectors in registers ZAH1 and ZAQ15, respectively.
  * Accumulator matrix: this is the entire accumulator array ZA.

This patch adds the register classes and related operands and parsing
for SME instructions operating on the accumulator array.

The ADDHA and ADDVA instructions which operate on tiles are also added
in this patch to make some use of the code added, later patches will
make use of the other operands introduced here.

The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2021-06

Co-authored by: Sander de Smalen (@sdesmalen)

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D105570
2021-07-14 08:25:49 +00:00
..
ADT Revert "[llvm] Add enum iteration to Sequence" 2021-07-13 16:44:42 +00:00
Analysis [ScalarEvolution] Strictly enforce pointer/int type rules. 2021-07-09 17:29:26 -07:00
AsmParser [SVE] Remove calls to VectorType::getNumElements from AsmParserTest 2020-07-07 14:55:42 -07:00
BinaryFormat [BinaryFormat] Add formatv support for DW_OP constants 2020-06-08 15:27:44 +02:00
Bitcode [AMDGPU] Set the default globals address space to 1 2020-11-20 15:46:53 +00:00
Bitstream PR51018: Remove explicit conversions from SmallString to StringRef to future-proof against C++23 2021-07-08 13:37:57 -07:00
CodeGen Revert "[llvm] Add enum iteration to Sequence" 2021-07-13 16:44:42 +00:00
DebugInfo PR51018: Remove explicit conversions from SmallString to StringRef to future-proof against C++23 2021-07-08 13:37:57 -07:00
Demangle [Demangle] Support Rust v0 mangling scheme in llvm::demangle 2021-06-17 10:37:26 +02:00
ExecutionEngine [ORC] Add wrapper-function support methods to ExecutorProcessControl. 2021-07-01 18:21:49 +10:00
FileCheck Bump googletest to 1.10.0 2021-05-14 19:16:31 +02:00
Frontend [OPENMP]Fix PR50129: omp cancel parallel not working as expected. 2021-06-04 08:24:55 -07:00
FuzzMutate [FuzzMutate] Add mutator to modify instruction flags. 2021-01-23 19:05:20 +00:00
InterfaceStub [llvm] Fix ODRViolations for VersionTuple YAML specializations NFC 2020-10-20 18:29:15 -07:00
IR Revert "[llvm] Add enum iteration to Sequence" 2021-07-13 16:44:42 +00:00
LineEditor
Linker [RGT] Recode more unreachable assertions and tautologies 2021-03-19 09:17:22 -07:00
MC [AsmParser][SystemZ][z/OS] Support for emitting labels in upper case 2021-06-24 12:50:11 -04:00
MI [AMDGPU] Rename amdgcn_wwm to amdgcn_strict_wwm 2021-03-03 09:33:57 +01:00
MIR CodeGen: Print/parse LLTs in MachineMemOperands 2021-06-30 16:54:13 -04:00
Object [AIX][XCOFF] emit vector info of traceback table. 2021-06-14 11:15:22 -04:00
ObjectYAML Add -Wno-error=unknown flag to clang-format. 2020-09-19 10:17:57 +02:00
Option [OptTable] Rename PrintHelp to printHelp 2021-06-24 14:47:03 -07:00
Passes unittests: Fix library dependency name 2021-07-07 06:56:15 -07:00
ProfileData [SampleFDO] New hierarchical discriminator for FS SampleFDO (llvm-profdata part) 2021-06-04 11:22:06 -07:00
Remarks [Remarks] Fix error message check in unit test 2019-10-31 15:51:36 -07:00
Support Support: reduce stack used in default size test. 2021-07-13 11:24:12 +01:00
TableGen Make TableGenGlobalISel an object library 2021-06-05 15:04:33 +02:00
Target [AArch64][SME] Add matrix register definitions and parsing support 2021-07-14 08:25:49 +00:00
TextAPI [llvm][TextAPI] add mapping from OS string to Platform 2021-05-06 16:25:56 -07:00
tools [llvm-exegesis] Loop unrolling for loop snippet repetitor mode 2021-05-25 12:08:27 +03:00
Transforms [NFC][OpaquePtr] Use GlobalValue::getValueType() more 2021-07-09 09:55:41 -07:00
XRay Put back the trailing commas on TYPED_TEST_SUITE 2021-05-17 14:14:13 +02:00
CMakeLists.txt [MIRPrinter] Add machine metadata support. 2021-06-19 12:48:08 -04:00
unittest.cfg.in