Krzysztof Parzyszek 36b88f31f1 [Hexagon] Improve stack address base reuse for HVX spills ... The offset in HVX loads/stores is only 4 bits long, so often an extra register is needed to hold the address. Minimize the number of such registers by "standardizing" the base addresses and reusing preexisting base registers when replacing frame indices.		2021-03-17 21:22:56 -05:00
..
Analysis	[ARM] Add VREV MVE shuffle costs	2021-03-17 21:21:43 +00:00
Assembler
Bindings	[OCaml] Handle nullptr in Llvm.global_initializer	2021-03-17 13:39:35 +00:00
Bitcode
BugPoint
CodeGen	[Hexagon] Improve stack address base reuse for HVX spills	2021-03-17 21:22:56 -05:00
DebugInfo	[RISCV] Make empty name symbols SF_FormatSpecific so that llvm-symbolizer ignores them for symbolization	2021-03-16 14:12:18 -07:00
Demangle
Examples
ExecutionEngine
Feature
FileCheck	[FileCheck] Fix redundant diagnostics due to numeric errors	2021-03-17 19:25:41 -04:00
Instrumentation
Integer
JitListener
Linker
LTO
MachineVerifier
MC	[AArch64] Parse "rng" feature flag in .arch directive	2021-03-16 14:10:19 -07:00
Object
ObjectYAML
Other
Reduce
SafepointIRVerifier
Support
SymbolRewriter
TableGen	[TableGen] Fix excessive compile time issue in FixedLenDecoderEmitter	2021-03-17 09:28:50 +00:00
ThinLTO/X86
tools	[NFC] make XCOFF dwarf dump test run only on PowerPC target.	2021-03-17 21:59:47 -04:00
Transforms	[LICM] Fix a crash when sinking instructions w/token operands	2021-03-17 11:18:46 -07:00
Unit	[lit] Sort test start times based on prior test timing data	2021-03-16 05:23:04 -04:00
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg.py
lit.site.cfg.py.in	[test] Add ability to get error messages from CMake for errc substitution	2021-03-15 20:56:08 +01:00
TestRunner.sh