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llvm-mirror/test/CodeGen
Simon Pilgrim 12f78b2c48 [X86][SSE] Keep 4i32 vector insertions in integer domain on SSE4.1 targets
4i32 shuffles for single insertions into zero vectors lowers to X86vzmovl which was using (v)blendps - causing domain switch stalls. This patch fixes this by using (v)pblendw instead.

The updated tests on test/CodeGen/X86/sse41.ll still contain a domain stall due to the use of insertps - I'm looking at fixing this in a future patch.

Differential Revision: http://reviews.llvm.org/D6458

llvm-svn: 223165
2014-12-02 22:31:23 +00:00
..
AArch64 [AArch64][Stackmaps] Optimize stackmap shadows on AArch64. 2014-12-02 21:36:24 +00:00
ARM Emit Tag_ABI_FP_denormal correctly in fast-math mode. 2014-12-02 08:22:29 +00:00
CPP
Generic
Hexagon Handle ctor/init_array initialization. 2014-11-03 14:56:05 +00:00
Inputs
Mips [mips] Fix passing of small structures for big-endian O32. 2014-12-02 20:40:27 +00:00
MSP430
NVPTX [NVPTX] Do not emit .weak symbols for NVPTX 2014-12-01 21:16:17 +00:00
PowerPC [PowerPC] Implement readcyclecounter for PPC32 2014-12-02 22:01:00 +00:00
R600 R600/SI: Move more information into SIProgramInfo struct 2014-12-02 21:28:53 +00:00
SPARC
SystemZ
Thumb [Thumb1] Re-write emitThumbRegPlusImmediate 2014-11-17 11:18:10 +00:00
Thumb2 ARM: allow constpool entry to be moved to the user's block in all cases. 2014-11-13 17:58:53 +00:00
X86 [X86][SSE] Keep 4i32 vector insertions in integer domain on SSE4.1 targets 2014-12-02 22:31:23 +00:00
XCore Fix a bit of confusion about .set and produce more readable assembly. 2014-10-21 01:17:30 +00:00